Thread (65 messages) 65 messages, 3 authors, 2012-06-21

[ 36/61] usb: musb: davinci: Fix build breakage

From: Greg KH <gregkh@linuxfoundation.org>
Date: 2012-06-20 18:22:53
Also in: lkml

3.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Jon Povey <redacted>

commit 6594b2d7b1ef8260e6e36ddc96bd37a40e39ba80 upstream.

This appears to have been broken by
commit 5cfb19ac604a68c030b245561f575c2d1bac1d49
(ARM: davinci: streamline sysmod access)

For now, fix by hardcoding USB_PHY_CTRL and DM355_DEEPSLEEP

Tested on DM365 with defconfig changes.

Signed-off-by: Jon Povey <redacted>
Acked-by: Sekhar Nori <redacted>
CC: Felipe Balbi <redacted>
Signed-off-by: Felipe Balbi <redacted>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/usb/musb/davinci.c |    1 +
 drivers/usb/musb/davinci.h |    4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -34,6 +34,7 @@
 #include <linux/dma-mapping.h>
 
 #include <mach/cputype.h>
+#include <mach/hardware.h>
 
 #include <asm/mach-types.h>
 
--- a/drivers/usb/musb/davinci.h
+++ b/drivers/usb/musb/davinci.h
@@ -15,7 +15,7 @@
  */
 
 /* Integrated highspeed/otg PHY */
-#define USBPHY_CTL_PADDR	(DAVINCI_SYSTEM_MODULE_BASE + 0x34)
+#define USBPHY_CTL_PADDR	0x01c40034
 #define USBPHY_DATAPOL		BIT(11)	/* (dm355) switch D+/D- */
 #define USBPHY_PHYCLKGD		BIT(8)
 #define USBPHY_SESNDEN		BIT(7)	/* v(sess_end) comparator */
@@ -27,7 +27,7 @@
 #define USBPHY_OTGPDWN		BIT(1)
 #define USBPHY_PHYPDWN		BIT(0)
 
-#define DM355_DEEPSLEEP_PADDR	(DAVINCI_SYSTEM_MODULE_BASE + 0x48)
+#define DM355_DEEPSLEEP_PADDR	0x01c40048
 #define DRVVBUS_FORCE		BIT(2)
 #define DRVVBUS_OVERRIDE	BIT(1)
 

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