Re: [PATCH v4 2/4] clk: rockchip: Add internal support for 24-bit fractional dividers

Hi heiko,

and as I wrote in my reply to Krzysztof slightly, less verbosity is
usually better. I.e. a short description what you did, not a detailed
list is usually nicer, i.e. something like

+++++++++++++
Signed-off-by: Elaine Zhang <redacted>
[adapted to mainline rockchip clock and reset handling (xin24m input,
  don't introduce CLK_NR_CLKS, etc) ]
Signed-off-by: Cunhao Lu <redacted>
+++++++++++++

I'll use this format in my next patches, mentioning only significant
changes and leaving out formatting and comment updates.

And as for speed, maybe give it a bit more time between iterations.
A version per day is a bit fast, as it doesn't give people time to actually
respond.

Understood. I can leave more time between revisions and focus on improving
the quality of each submission.

Best regards,
Cunhao Lu