[PATCH 16/27] net: stmmac: dwmac-rk: Add RK3572 support
flat view
WARM3d
From: Cunhao Lu via B4 Relay <devnull+1579567540.qq.com@kernel.org>
Date: 2026-10-21 16:12:23
Also in:
b4-sent, linux-clk, linux-devicetree, linux-gpio, linux-i2c, linux-mmc, linux-phy, linux-pm, linux-rockchip, linux-serial, linux-usb, lkml
Subsystem:
arm/rockchip soc support, networking drivers, stmmac ethernet driver, the rest · Maintainers:
Heiko Stuebner, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Maxime Chevallier, Linus Torvalds
From: Cunhao Lu <redacted> Configure RGMII delays and clocks for both RK3572 GMAC controllers, using GMAC-specific GRF registers. Signed-off-by: Cunhao Lu <redacted> --- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 53 ++++++++++++++++++++++++++ 1 file changed, 53 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 72bdbcb5e863..1a22233179ab 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c@@ -872,6 +872,58 @@ static const struct rk_gmac_ops rk3568_ops = { }, }; +#define RK3572_VCCIO0_3_VO_IOC_CON1 0x10608 +#define RK3572_VCCIO1_2_4_VI_IOC_CON1 0x12604 +#define RK3572_VCCIO5_6_IOC_MISC0 0x14630 +#define RK3572_PHP_GRF_GMAC0_CON 0x0070 +#define RK3572_NVM0_GRF_GMAC1_CON 0x0020 + +static int rk3572_init(struct rk_priv_data *bsp_priv) +{ + switch (bsp_priv->id) { + case 0: + bsp_priv->gmac_grf_reg = RK3572_PHP_GRF_GMAC0_CON; + break; + case 1: + bsp_priv->gmac_grf_reg = RK3572_NVM0_GRF_GMAC1_CON; + break; + default: + return -EINVAL; + } + + bsp_priv->clock_grf_reg = bsp_priv->gmac_grf_reg; + return 0; +} + +static void rk3572_set_to_rgmii(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay) +{ + u32 val = GRF_FIELD(14, 8, rx_delay) | GRF_FIELD(6, 0, tx_delay) | + GRF_FIELD(15, 15, !!rx_delay) | GRF_FIELD(7, 7, !!tx_delay); + + if (bsp_priv->id == 1) { + regmap_write(bsp_priv->php_grf, RK3572_VCCIO0_3_VO_IOC_CON1, val); + regmap_write(bsp_priv->php_grf, RK3572_VCCIO5_6_IOC_MISC0, val); + } else { + regmap_write(bsp_priv->php_grf, RK3572_VCCIO1_2_4_VI_IOC_CON1, val); + } +} + +static const struct rk_gmac_ops rk3572_ops = { + .init = rk3572_init, + .set_to_rgmii = rk3572_set_to_rgmii, + .gmac_phy_intf_sel_mask = GENMASK_U16(11, 9), + .gmac_rmii_mode_mask = BIT_U16(3), + .clock.io_clksel_io_mask = BIT_U16(7), + .clock.gmii_clk_sel_mask = GENMASK_U16(6, 5), + .clock.rmii_clk_sel_mask = BIT_U16(5), + .clock.rmii_gate_en_mask = BIT_U16(4), + .supports_rmii = true, + .php_grf_required = true, + .regs_valid = true, + .regs = { 0x29d20000, 0x2a040000, 0 }, +}; + /* VCCIO0_1_3_IOC */ #define RK3576_VCCIO0_1_3_IOC_CON2 0X6408 #define RK3576_VCCIO0_1_3_IOC_CON3 0X640c
@@ -1629,6 +1681,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = { { .compatible = "rockchip,rk3506-gmac", .data = &rk3506_ops }, { .compatible = "rockchip,rk3528-gmac", .data = &rk3528_ops }, { .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops }, + { .compatible = "rockchip,rk3572-gmac", .data = &rk3572_ops }, { .compatible = "rockchip,rk3576-gmac", .data = &rk3576_ops }, { .compatible = "rockchip,rk3588-gmac", .data = &rk3588_ops }, { .compatible = "rockchip,rv1108-gmac", .data = &rv1108_ops },
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2.34.1