Re: [PATCH net-next v6 3/9] net: dsa: realtek: rtl8365mb: set speed for family D
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From: Linus Walleij <linusw@kernel.org>
Date: 2026-10-16 20:04:56
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On Fri, Oct 16, 2026 at 3:03 AM Mieczyslaw Nalewaj [off-list ref] wrote:
On family C hardware, forcing a 2.5 Gbps link speed requires relying strictly on the HSGMII SerDes configuration block, while forcing a dummy 1 Gbps value inside the standard digital interface register. Family D introduces a dedicated hardware link speed value (5) for 2500M. The speed bitfield width has been expanded to 3 bits, splitting the most significant bit into a new separate register field (FORCE_SPEED2), which maps directly to a distinct per-port digital interface force layout. On family D the forced-mode configuration (link, duplex, pause, speed) is written to a per-port register at 0x12c0 + port instead of the per-extint register. The bit positions of TXPAUSE, RXPAUSE, LINK, DUPLEX and the low two speed bits are the same as on family C; the upper speed bits go to bits 13:12 (FORCE_SPEED2), so FORCE_EN (bit 12 on family C) is not set. A second per-port register at 0x12c8 + port enables the forced mode: the vendor RTL8367D API writes 0xFFFF there when the MAC is forced and 0 otherwise. This driver always forces the MAC, as on family C, so it writes 0xFFFF on every call, including link down. Signed-off-by: Mieczyslaw Nalewaj <redacted>
It's pretty terse but I think I get it...
quoted hunk ↗ jump to hunk
- if (speed == SPEED_2500 || speed == SPEED_1000) { + if (speed == SPEED_2500) { + if (is_d) { + r_speed = RTL8365MB_D_PORT_SPEED_2500M; + } else { + /* The speed field has no value for 2.5 Gbps: + * the rate is determined by the HSGMII SerDes + * configuration, and the vendor driver programs + * the 1 Gbps value here. + */ + r_speed = RTL8365MB_PORT_SPEED_1000M; + }
Well what else can we do. Reviewed-by: Linus Walleij <linusw@kernel.org> Yours, Linus Walleij