quoted hunk ↗ jump to hunk
+ { .revision = ENETC_REV_4_4,
+ .dev_id = NXP_ENETC_PPM_DEV_ID,
+ .data = &enetc4_ppm_data,
+ },
You have reused driver data of the i.MX94, which has a system clock
frequency of 333 MHz. However, for the S32N7, I think its system
clock frequency to be 500 MHz. And the system clock frequency is
used for DIM. Therefore, you'd better to add the new driver data
for S32N7.
quoted hunk ↗ jump to hunk
+ { .revision = ENETC_REV_4_4,
+ .dev_id = NXP_ENETC_PF_DEV_ID,
+ .data = &enetc4_ppm_data,
+ },
+ { .revision = ENETC_REV_4_4,
+ .dev_id = NXP_ENETC_VF_DEV_ID,
+ .data = &enetc4_vf_data,
+ },
};
int enetc_get_driver_data(struct enetc_si *si)diff --git a/drivers/net/ethernet/freescale/enetc/enetc_hw.h
b/drivers/net/ethernet/freescale/enetc/enetc_hw.h
index 2c9d9042eb0b..64789bd0f33e 100644
--- a/drivers/net/ethernet/freescale/enetc/enetc_hw.h
+++ b/drivers/net/ethernet/freescale/enetc/enetc_hw.h
@@ -414,6 +414,7 @@ enum enetc_bdr_type {TX, RX};
#define ENETC_REV_1_0 0x0100
#define ENETC_REV_4_1 0X0401
#define ENETC_REV_4_3 0x0403
+#define ENETC_REV_4_4 0x0404
#define ENETC_G_EIPBRR1 0x0bfc
#define ENETC_G_EPFBLPR(n) (0xd00 + 4 * (n))
--2.34.1