[PATCH net-next 1/5] net: sparx5: Drop redundant POL_ prefix from POL_UPD_INT_CFG
flat view
COOLING4d
From: Daniel Machon <daniel.machon@microchip.com>
Date: 2026-10-09 11:54:12
Also in:
linux-arm-kernel, lkml
Subsystem:
networking drivers, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
The macros for the ANA_AC_POL:POL_UPD_INT_CFG register are named ANA_AC_POL_POL_UPD_INT_CFG*, repeating the POL_ prefix that is already part of the target name. Rename them to ANA_AC_POL_UPD_INT_CFG*, so that the port policer registers added in the next patch can use the same short form. No functional change. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> --- drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 6 +++--- drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
index b530fb6d3d0c..4655de43f042 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c@@ -616,10 +616,10 @@ static int sparx5_init_coreclock(struct sparx5 *sparx5) sparx5, HSCH_TAS_STATEMACHINE_CFG); - spx5_rmw(ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT_SET(pol_upd_int), - ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT, + spx5_rmw(ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT_SET(pol_upd_int), + ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT, sparx5, - ANA_AC_POL_POL_UPD_INT_CFG); + ANA_AC_POL_UPD_INT_CFG); return 0; }
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h
index d34467513648..7ae4f7ed8e50 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h@@ -939,15 +939,15 @@ extern const struct sparx5_regs *regs; FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x) /* ANA_AC_POL:POL_ALL_CFG:POL_UPD_INT_CFG */ -#define ANA_AC_POL_POL_UPD_INT_CFG \ +#define ANA_AC_POL_UPD_INT_CFG \ __REG(TARGET_ANA_AC_POL, 0, 1, regs->gaddr[GA_ANA_AC_POL_POL_ALL_CFG], \ 0, 1, 1160, 1148, 0, 1, 4) -#define ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT GENMASK(9, 0) -#define ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT_SET(x)\ - FIELD_PREP(ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT, x) -#define ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT_GET(x)\ - FIELD_GET(ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT, x) +#define ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT GENMASK(9, 0) +#define ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT_SET(x)\ + FIELD_PREP(ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT, x) +#define ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT_GET(x)\ + FIELD_GET(ANA_AC_POL_UPD_INT_CFG_POL_UPD_INT, x) /* ANA_AC_POL:COMMON_BDLB:DLB_CTRL */ #define ANA_AC_POL_BDLB_DLB_CTRL \
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2.34.1