[PATCH net-next v3 1/5] dt-bindings: net: sun8i-emac: Add A733 GMAC210 compatible
flat view
COOLING9d
REVIEWED: 6 (6M)
From: Jerome Brunet <jbrunet@baylibre.com>
Date: 2026-09-23 20:48:05
Also in:
linux-arm-kernel, linux-devicetree, linux-sunxi, lkml
Subsystem:
networking drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
1 review trailer (1 from subsystem maintainers).
The A733 GMAC210 is a DesignWare MAC 5.20 close to the A523 GMAC200, with the following differences: * The glue configuration registers are a dedicated MMIO region of the controller instead of a syscon register, so a second reg entry replaces the syscon phandle. * The DMA channels and the LPI event have their own interrupt lines. * A PTP reference clock and an AHB reset are needed. * Unlike the A523, the controller does not appear to belong to a power domain. * The TX clock delay field is 5 bits wide and both TX and RX delays use a 180ps step, allowing up to 5580ps. Add the new compatible and describe those differences. Declare the internal delay properties at the top level and keep their limits per compatible. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- .../bindings/net/allwinner,sun8i-a83t-emac.yaml | 142 ++++++++++++++++++--- 1 file changed, 126 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
index 323a669fa982..a4e0d9b760fe 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml@@ -22,6 +22,7 @@ select: - allwinner,sun8i-v3s-emac - allwinner,sun50i-a64-emac - allwinner,sun55i-a523-gmac200 + - allwinner,sun60i-a733-gmac210 required: - compatible
@@ -44,25 +45,38 @@ properties: - items: - const: allwinner,sun55i-a523-gmac200 - const: snps,dwmac-4.20a + - items: + - const: allwinner,sun60i-a733-gmac210 + - const: snps,dwmac-5.20 reg: - maxItems: 1 + minItems: 1 + items: + - description: MAC controller registers + - description: Glue configuration registers interrupts: - maxItems: 1 + minItems: 1 + maxItems: 4 interrupt-names: - const: macirq + minItems: 1 + items: + - const: macirq + - const: eth_lpi + - const: tx-queue-0 + - const: rx-queue-0 clocks: minItems: 1 - maxItems: 2 + maxItems: 3 clock-names: minItems: 1 items: - const: stmmaceth - const: mbus + - const: ptp_ref phy-supply: description: PHY regulator
@@ -76,6 +90,18 @@ properties: Phandle to the device containing the EMAC or GMAC clock register + tx-internal-delay-ps: + default: 0 + minimum: 0 + description: + Internal RGMII PHY TX clock delay chain value in ps. + + rx-internal-delay-ps: + default: 0 + minimum: 0 + description: + Internal RGMII PHY RX clock delay chain value in ps. + required: - compatible - reg
@@ -87,7 +113,6 @@ required: - reset-names - phy-handle - phy-mode - - syscon allOf: - $ref: snps,dwmac.yaml#
@@ -215,6 +240,34 @@ allOf: - mdio-parent-bus - mdio@1 + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-r40-gmac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + then: + properties: + reg: + maxItems: 1 + interrupts: + maxItems: 1 + interrupt-names: + maxItems: 1 + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + power-domains: false + tx-internal-delay-ps: false + rx-internal-delay-ps: false + required: + - syscon + - if: properties: compatible:
@@ -222,32 +275,60 @@ allOf: const: allwinner,sun55i-a523-gmac200 then: properties: + reg: + maxItems: 1 + interrupts: + maxItems: 1 + interrupt-names: + maxItems: 1 clocks: minItems: 2 + maxItems: 2 clock-names: minItems: 2 + maxItems: 2 + resets: + maxItems: 1 + reset-names: + maxItems: 1 tx-internal-delay-ps: - default: 0 - minimum: 0 maximum: 700 multipleOf: 100 - description: - External RGMII PHY TX clock delay chain value in ps. rx-internal-delay-ps: - default: 0 - minimum: 0 maximum: 3100 multipleOf: 100 - description: - External RGMII PHY TX clock delay chain value in ps. required: - power-domains - else: + - syscon + + - if: properties: + compatible: + contains: + const: allwinner,sun60i-a733-gmac210 + then: + properties: + reg: + minItems: 2 + interrupts: + minItems: 4 + interrupt-names: + minItems: 4 clocks: - maxItems: 1 + minItems: 3 clock-names: - maxItems: 1 + minItems: 3 + resets: + minItems: 2 + reset-names: + minItems: 2 + tx-internal-delay-ps: + maximum: 5580 + multipleOf: 180 + rx-internal-delay-ps: + maximum: 5580 + multipleOf: 180 + syscon: false power-domains: false unevaluatedProperties: false
@@ -412,4 +493,33 @@ examples: }; }; }; + + - | + ethernet@4510000 { + compatible = "allwinner,sun60i-a733-gmac210", + "snps,dwmac-5.20"; + reg = <0x04510000 0x8000>, + <0x04518000 0x1000>; + clocks = <&ccu 58>, <&ccu 59>, <&ccu 60>; + clock-names = "stmmaceth", "mbus", "ptp_ref"; + resets = <&ccu 30>, <&ccu 31>; + reset-names = "stmmaceth", "ahb"; + interrupts = <0 175 4>, <0 179 4>, <0 176 4>, <0 177 4>; + interrupt-names = "macirq", "eth_lpi", "tx-queue-0", "rx-queue-0"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins>; + phy-handle = <&ext_rgmii_phy_2>; + phy-mode = "rgmii-id"; + snps,fixed-burst; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ext_rgmii_phy_2: ethernet-phy@1 { + reg = <1>; + }; + }; + }; ...
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2.53.0