[PATCH RFC net-next 3/9] net: pcs: xpcs: add custom platform register accessors
COOLING6d
From: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Date: 2026-09-23 01:08:43
Also in:
linux-arm-kernel, linux-arm-msm, linux-devicetree, lkml
Subsystem:
ethernet phy library, networking drivers, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Some XPCS integrations do not expose the standard direct or indirect register layout. Allow the platform driver to use optional register read and write callbacks for both Clause 22 and Clause 45 accesses, while retaining the existing access paths when no callbacks are supplied. Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> --- drivers/net/pcs/pcs-xpcs-plat.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/drivers/net/pcs/pcs-xpcs-plat.c b/drivers/net/pcs/pcs-xpcs-plat.c
index e669a7b248ac4677aeb5cd1874108f5c87f837d2..e78a233fb198d940951064a71e8597c6c666bc9d 100644
--- a/drivers/net/pcs/pcs-xpcs-plat.c
+++ b/drivers/net/pcs/pcs-xpcs-plat.c@@ -24,8 +24,16 @@ /* Page select register for the indirect MMIO CSRs access */ #define DW_VR_CSR_VIEWPORT 0xff +struct dw_xpcs_plat_ops { + int (*reg_read)(struct platform_device *pdev, void __iomem *reg_base, + int dev, int reg); + int (*reg_write)(struct platform_device *pdev, void __iomem *reg_base, + int dev, int reg, u16 val); +}; + struct dw_xpcs_plat { struct platform_device *pdev; + const struct dw_xpcs_plat_ops *ops; struct mii_bus *bus; bool reg_indir; int reg_width;
@@ -169,6 +177,10 @@ static int xpcs_mmio_read_c22(struct mii_bus *bus, int addr, int reg) if (addr != 0) return -ENODEV; + if (pxpcs->ops) + return pxpcs->ops->reg_read(pxpcs->pdev, pxpcs->reg_base, + MDIO_MMD_VEND2, reg); + if (pxpcs->reg_indir) return xpcs_mmio_read_reg_indirect(pxpcs, MDIO_MMD_VEND2, reg); else
@@ -182,6 +194,10 @@ static int xpcs_mmio_write_c22(struct mii_bus *bus, int addr, int reg, u16 val) if (addr != 0) return -ENODEV; + if (pxpcs->ops) + return pxpcs->ops->reg_write(pxpcs->pdev, pxpcs->reg_base, + MDIO_MMD_VEND2, reg, val); + if (pxpcs->reg_indir) return xpcs_mmio_write_reg_indirect(pxpcs, MDIO_MMD_VEND2, reg, val); else
@@ -195,6 +211,10 @@ static int xpcs_mmio_read_c45(struct mii_bus *bus, int addr, int dev, int reg) if (addr != 0) return -ENODEV; + if (pxpcs->ops) + return pxpcs->ops->reg_read(pxpcs->pdev, pxpcs->reg_base, + dev, reg); + if (pxpcs->reg_indir) return xpcs_mmio_read_reg_indirect(pxpcs, dev, reg); else
@@ -209,6 +229,10 @@ static int xpcs_mmio_write_c45(struct mii_bus *bus, int addr, int dev, if (addr != 0) return -ENODEV; + if (pxpcs->ops) + return pxpcs->ops->reg_write(pxpcs->pdev, pxpcs->reg_base, + dev, reg, val); + if (pxpcs->reg_indir) return xpcs_mmio_write_reg_indirect(pxpcs, dev, reg, val); else
--
2.34.1