Re: [PATCHv2 net] net: phy: marvell: undo WoL setup when Wake-on-LAN is disabled

On Mon, 14 Sep 2026 14:24:09 -0700 Rosen Penev wrote:

Fully disabling Wake-on-LAN on the 88E1318S/88E1510 used to leave
the WoL interrupt enable bit (CSIER.WOL_EIE) set and LED[2]
configured as the INTn pin. A magic packet arriving after "wol d"
would still assert INTn, and a later "wol g" re-enabled WoL from a
dirty register state.

Fully disabling WoL clears CSIER.WOL_EIE on the copper page. The
LED[2]/INTn pin mux is disposed of only when this driver forced it to
the INTn function: the INTn enable and polarity bits read at arming
time are saved, and restored once all WoL options are cleared, so PHYs
serving the MAC interrupt, strap configs, or marvell,reg-init values
are never touched. The FORCE_INT bit is not set while disposing of the
pin: it holds the interrupt line asserted and turns the shared PHY
interrupt into a "nobody cared" IRQ storm when the PHY interrupt is in
use.

Oof, this is pretty hard to read. The paragraph is pretty much 2
run-on sentences.

Please add info about how the issue was discovered and how it was
tested. If you don't have HW back to net-next without Fixes it goes.
The AI is pretty bad at judging severity, I need to find time to tune
the Fixes suggestions further :/
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pw-bot: cr