Review and fix the incorrectness in the bit field names. No functional
change.
Signed-off-by: David Yang <mmyangfl@gmail.com>
---
drivers/net/dsa/motorcomm/chip.c | 3 ++-
drivers/net/dsa/motorcomm/chip.h | 9 +++++----
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/chip.c
index bcc9542370c2..5049f4be8aa6 100644
--- a/drivers/net/dsa/motorcomm/chip.c
+++ b/drivers/net/dsa/motorcomm/chip.c
@@ -3742,7 +3742,8 @@ static int yt921x_port_down(struct yt921x_priv *priv, int port)
u32 mask;
int res;
- mask = YT921X_PORT_LINK | YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN;
+ mask = YT921X_PORT_CTRL_LINK_AN | YT921X_PORT_RX_MAC_EN |
+ YT921X_PORT_TX_MAC_EN;
res = yt921x_reg_clear_bits(priv, YT921X_PORTn_CTRL(port), mask);
if (res)
return res;
diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/chip.h
index fd552f7dced4..3fb0c6a69dd8 100644
--- a/drivers/net/dsa/motorcomm/chip.h
+++ b/drivers/net/dsa/motorcomm/chip.h
@@ -42,7 +42,7 @@
#define YT921X_PVID_SEL 0x80014
#define YT921X_PVID_SEL_SVID_PORTn(port) BIT(port)
#define YT921X_SERDES_CTRL 0x80028
-#define YT921X_SERDES_CTRL_PORTn_TEST(port) BIT((port) - 3)
+#define YT921X_SERDES_CTRL_TEST BIT(6)
#define YT921X_SERDES_CTRL_PORTn(port) BIT((port) - 8)
#define YT921X_IO_LEVEL 0x80030
#define YT9215_IO_LEVEL_NORMAL_M GENMASK(5, 4)
@@ -94,11 +94,12 @@
#define YT921X_SERDES_SPEED_1000 YT921X_SERDES_SPEED(2)
#define YT921X_SERDES_SPEED_10000 YT921X_SERDES_SPEED(3)
#define YT921X_SERDES_SPEED_2500 YT921X_SERDES_SPEED(4)
-#define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port))
+#define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) /* Bit 7-0 shared with PORT_STATUS */
#define YT921X_PORT_CTRL_PAUSE_AN BIT(10)
+#define YT921X_PORT_CTRL_LINK_AN BIT(9)
+#define YT921X_PORT_CTRL_HALF_PAUSE BIT(8) /* Half-duplex back pressure mode */
#define YT921X_PORTn_STATUS(port) (0x80200 + 4 * (port))
-#define YT921X_PORT_LINK BIT(9) /* CTRL: auto negotiation */
-#define YT921X_PORT_HALF_PAUSE BIT(8) /* Half-duplex back pressure mode */
+#define YT921X_PORT_LINK BIT(8)
#define YT921X_PORT_DUPLEX_FULL BIT(7)
#define YT921X_PORT_RX_PAUSE BIT(6)
#define YT921X_PORT_TX_PAUSE BIT(5)
--
2.53.0