Hi,
On 9/16/26 05:07, James Hilliard wrote:
The H616 secondary EMAC supports RMII at 10/100 Mbps and uses a separate
system-control clock register at offset 0x34. Add its binding and a
sun8i stmmac variant using that register. A distinct compatible without
an older fallback prevents the driver from using EMAC0's clock register.
EMAC1 connects internally to the co-packaged AC200 or AC300 EPHY and has
no external PHY pins. Leave PHY initialization to the PHY driver instead
of using the H3 internal-PHY controls. The RMII-only variant does not
expose the RGMII clock-delay properties.
The AC200/AC300 EPHY driver and package bindings are already in
net-next. This series separates the H616 EMAC1 MAC driver and binding
support from the earlier combined series. PWM, MFD and device-tree
enablement are being handled separately.
Signed-off-by: James Hilliard <redacted>
---
Changes in v2:
- Drop EMAC1 TX/RX clock-delay property support and keep the existing
RGMII-only delay descriptions unchanged, as requested by Maxime Ripard.
- Clarify that EMAC1 connects internally to a co-packaged PHY, not an
external PHY or the H3-style internal-PHY controls.
- Rebase onto current net-next.
- Link to v1: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v1-0-195de0bb1f8a@gmail.com
I didn't see that V2, but in all fairness you're not supposed to iterate
this fast. 24 hours between submissions, please :
https://docs.kernel.org/process/maintainer-netdev.html
There were discussions on Alastair's submission too, the MUX, clock,
reset part.
Adding Alastair so that he can test it on his board, and see what's missing.
Maxime