[PATCH net-next 1/7] net: dsa: motorcomm: Split xMII and SERDES port masks

@@ -96,18 +96,6 @@ static const struct yt921x_mib_desc yt921x_mib_descs[] = {
 	MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"),
 };
 
-struct yt921x_info {
-	const char *name;
-	u16 major;
-	/* Unknown, seems to be plain enumeration */
-	u8 mode;
-	u8 extmode;
-	/* Ports with integral GbE PHYs, not including MCU Port 10 */
-	u16 internal_mask;
-	/* TODO: see comments in yt921x_dsa_phylink_get_caps() */
-	u16 external_mask;
-};
-
 #define YT921X_PORT_MASK_INTn(port)	BIT(port)
 #define YT921X_PORT_MASK_INT0_n(n)	GENMASK((n) - 1, 0)
 #define YT921X_PORT_MASK_EXT0		BIT(8)

@@ -117,37 +105,44 @@ static const struct yt921x_info yt921x_infos[] = {
 	{
 		"YT9215SC", YT9215_MAJOR, 1, 0,
 		YT921X_PORT_MASK_INT0_n(5),
+		YT921X_PORT_MASK_EXT1,
 		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,
 	},
 	{
 		"YT9215S", YT9215_MAJOR, 2, 0,
 		YT921X_PORT_MASK_INT0_n(5),
-		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,
+		YT921X_PORT_MASK_EXT1,
+		YT921X_PORT_MASK_EXT0,
 	},
 	{
 		"YT9215RB", YT9215_MAJOR, 3, 0,
 		YT921X_PORT_MASK_INT0_n(5),
 		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,
+		0,
 	},
 	{
 		"YT9214NB", YT9215_MAJOR, 3, 2,
 		YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3),
-		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,
+		YT921X_PORT_MASK_EXT1,
+		YT921X_PORT_MASK_EXT0,
 	},
 	{
 		"YT9213NB", YT9215_MAJOR, 3, 3,
 		YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3),
 		YT921X_PORT_MASK_EXT1,
+		YT921X_PORT_MASK_EXT1,
 	},
 	{
 		"YT9218N", YT9218_MAJOR, 0, 0,
 		YT921X_PORT_MASK_INT0_n(8),
 		0,
+		0,
 	},
 	{
 		"YT9218MB", YT9218_MAJOR, 1, 0,
 		YT921X_PORT_MASK_INT0_n(8),
 		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,
+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,
 	},
 	{}
 };

@@ -4026,15 +4021,10 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, int port,
 		 */
 		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
 			  config->supported_interfaces);
-	} else if (info->external_mask & BIT(port)) {
-		/* TODO: external ports may support SERDES only, XMII only, or
-		 * SERDES + XMII depending on the chip. However, we can't get
-		 * the accurate config table due to lack of document, thus
-		 * we simply declare SERDES + XMII and rely on the correctness
-		 * of devicetree for now.
-		 */
+		return;
+	}
 
-		/* SERDES */
+	if (BIT(port) & info->serdes_mask) {
 		__set_bit(PHY_INTERFACE_MODE_SGMII,
 			  config->supported_interfaces);
 		/* REVSGMII (SGMII in PHY role) should go here, once

@@ -4047,9 +4037,8 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, int port,
 		__set_bit(PHY_INTERFACE_MODE_2500BASEX,
 			  config->supported_interfaces);
 		config->mac_capabilities |= MAC_2500FD;
-
-		/* XMII */
-
+	}
+	if (BIT(port) & info->xmii_mask) {
 		/* Not tested. To add support for XMII:
 		 *   - Add proper interface modes below
 		 *   - Handle them in yt921x_port_config()

@@ -960,6 +960,24 @@ struct yt921x_reg_ops {
 	int (*write)(void *context, u32 reg, u32 val);
 };
 
+struct yt921x_info {
+	const char *name;
+	u16 major;
+	/* Unknown, seems to be plain enumeration */
+	u8 mode;
+	u8 extmode;
+	/* Ports with integral GbE PHYs, not including MCU Port 10 */
+	u16 internal_mask;
+	/* Note: xmii_mask and serdes_mask may overlap */
+	u16 xmii_mask;
+	u16 serdes_mask;
+};
+
+static inline u16 yt921x_info_ports_mask(const struct yt921x_info *info)
+{
+	return info->internal_mask | info->xmii_mask | info->serdes_mask;
+}
+
 struct yt921x_priv {
 	struct dsa_switch ds;