On Thu, 06 Aug 2026 23:41:49 +0530, Suraj Gupta wrote:
The XXV Ethernet IP integrates a 10G/25G Ethernet MAC with an in-core
PCS/PMA driving a high-speed serial transceiver. Its payload is moved by
an external AXI DMA (or multichannel DMA) controller referenced through
the dmas/dma-names properties. Document the IP in a dedicated schema
file.
Add the "xlnx,xxv-ethernet-1.0" compatible with the 10gbase-r and
25gbase-r phy-modes, the rx_core/drp/s_axi clocks and the AXI DMA
channel properties.
Signed-off-by: Suraj Gupta <redacted>
---
.../bindings/net/xlnx,xxv-ethernet.yaml | 107 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 108 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/xlnx,xxv-ethernet.yaml
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>