[PATCH net v6 2/4] net: phy: dp83640: embed pin configuration in clock
COLD48d
REVIEWED: 8 (8M)
From: Xuanqiang Luo <hidden>
Date: 2026-08-11 15:16:03
Subsystem:
ethernet phy library, networking drivers, ptp hardware clock support, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Richard Cochran, Linus Torvalds
Revision v6 of 3 in this series; 1 review trailer (1 from subsystem maintainers).
Revisions (3)
- v4 [diff vs current]
- v5 [diff vs current]
- v6 current
From: Xuanqiang Luo <redacted> The DP83640 has a fixed number of PTP pins, and its pin configuration has the same lifetime as the per-bus clock. Allocating the configuration separately adds an allocation failure path and requires a separate free. Embed the pin configuration in struct dp83640_clock and point the PTP clock information at the embedded array. This changes only the storage; the pin functions remain configurable at runtime. It also allows all per-bus clock storage to be managed as one allocation. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Xuanqiang Luo <redacted> --- drivers/net/phy/dp83640.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index 98472abdd3920..ba39d30b74705 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers/net/phy/dp83640.c@@ -146,6 +146,8 @@ struct dp83640_clock { struct list_head phylist; /* reference to our PTP hardware clock */ struct ptp_clock *ptp_clock; + /* protected by the PTP core pin configuration lock */ + struct ptp_pin_desc pin_config[DP83640_N_PINS]; }; /* globals */
@@ -960,6 +962,7 @@ static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus) mutex_init(&clock->extreg_lock); mutex_init(&clock->clock_lock); INIT_LIST_HEAD(&clock->phylist); + clock->caps.pin_config = clock->pin_config; clock->caps.owner = THIS_MODULE; sprintf(clock->caps.name, "dp83640 timer"); clock->caps.max_adj = 1953124;
@@ -977,9 +980,7 @@ static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus) clock->caps.settime64 = ptp_dp83640_settime; clock->caps.enable = ptp_dp83640_enable; clock->caps.verify = ptp_dp83640_verify; - /* - * Convert the module param defaults into a dynamic pin configuration. - */ + /* Initialize the runtime pin configuration from gpio_tab. */ dp83640_gpio_defaults(clock->caps.pin_config); /* * Get a reference to this bus instance.
@@ -1031,13 +1032,6 @@ static struct dp83640_clock *dp83640_clock_get_bus(struct mii_bus *bus) if (!clock) goto out; - clock->caps.pin_config = kzalloc_objs(struct ptp_pin_desc, - DP83640_N_PINS); - if (!clock->caps.pin_config) { - kfree(clock); - clock = NULL; - goto out; - } dp83640_clock_init(clock, bus); list_add_tail(&clock->list, &phyter_clocks); out:
@@ -1509,7 +1503,6 @@ static void dp83640_remove(struct phy_device *phydev) mutex_destroy(&clock->extreg_lock); mutex_destroy(&clock->clock_lock); put_device(&clock->bus->dev); - kfree(clock->caps.pin_config); kfree(clock); } }
--
2.43.0