[PATCH v3 iwl-next 0/3] ice: expose TSPLL state on E825 through dpll subsystem

On E825 devices that own the source timer, the TSPLL can lose lock when
the TCXO or TIME_REF signal is disrupted. This series adds monitoring
and recovery for that condition, then surfaces the lock status and clock
source selection through the dpll subsystem. It also fixes the clock_id
generation for E825 generic DPLL devices so userspace can unambiguously
map each DPLL device to its owning interface.

Patch 1 adds TSPLL lock monitoring to ice_ptp_periodic_work(). Placing it
there ensures recovery runs regardless of whether DPLL init succeeded or
CONFIG_DPLL is enabled. Lock state is cached in pf->ptp.tspll_locked via
WRITE_ONCE()/READ_ONCE() for consumption by the DPLL worker.

Patch 2 registers the TSPLL as a DPLL_TYPE_GENERIC device for E825 owner
PFs, with a fwnode-backed "time_ref" input pin. The pin state_on_dpll_set
callback switches the clock source between TIME_REF and TCXO. Lock status
is read from pf->ptp.tspll_locked; UNLOCKED is reported unconditionally
when the clock source is TCXO to reflect the free-running oscillator state.

Patch 3 changes the clock_id generation for E825 TX-CLK and TSPLL DPLLs.
Previously they used the board-level PCIe DSN, which is identical for
all interfaces sharing the same NAC/quad, so userspace could not tell
them apart. The new scheme derives the clock_id from the permanent port
MAC (with a dedicated tag bit distinguishing TSPLL from TX-CLK), while
other DPLL objects (EEC/PPS and non-E825 paths) keep the board-level
DSN-derived clock_id.

Changes in v3:
- Addressed Sashiko concerns from:
  https://sashiko.dev/#/patchset/20260731121216.1841413-1-grzegorz.nitka%40intel.com
  - Fix spurious TSPLL lock-status flapping from the DPLL set callback.
  - Serialize ice_ptp_tspll_monitor() with the DPLL set callback under
    pf->dplls.lock (mutex lifetime moved to ice_init_features()).

Changes in v2:
- rebased
- Patch 2: Fix TOCTOU race between DPLL state_on_dpll_set and PTP
  TSPLL monitor by serializing both paths on pf->dplls.lock. Lift
  pf->dplls.lock lifetime to ice_init_features()/ice_deinit_features()
  so ice_ptp_tspll_monitor() can take it unconditionally. Remove the
  now-redundant ICE_FLAG_DPLL gate in the monitor. Update kernel-doc
  Context: notes to reflect the new lifetime. (Addresses review from
  https://sashiko.dev/#/patchset/20260728091314.1420656-1-grzegorz.nitka%40intel.com)

Grzegorz Nitka (3):
  ice: monitor TSPLL lock from PTP periodic worker
  ice: add TSPLL DPLL device and TIME_REF pin for E825
  ice: use per-interface clock_id for E825 generic DPLLs

 drivers/net/ethernet/intel/ice/ice_dpll.c  | 501 ++++++++++++++++++---
 drivers/net/ethernet/intel/ice/ice_dpll.h  |   4 +
 drivers/net/ethernet/intel/ice/ice_main.c  |   9 +
 drivers/net/ethernet/intel/ice/ice_ptp.c   |  82 ++++
 drivers/net/ethernet/intel/ice/ice_ptp.h   |  11 +
 drivers/net/ethernet/intel/ice/ice_tspll.c | 122 ++++-
 drivers/net/ethernet/intel/ice/ice_tspll.h |   6 +
 7 files changed, 674 insertions(+), 61 deletions(-)


base-commit: 6e41d29c60deeb29a88debd2540dab757674834d
-- 
2.39.3