[PATCH 0/6] Add support for Qualcomm TSCSS hardware
From: Imran Shaik <hidden>
Date: 2026-07-27 14:11:34
Also in:
linux-arm-msm, linux-devicetree, lkml
This series introduces support for the Qualcomm Timestamp Counter Subsystem
(TSCSS) hardware, a time synchronization subsystem present on Qualcomm
Lemans, Monaco and QDU1000 SoCs.
TSCSS is composed of two main hardware blocks:
- Timestamp Counter (TSC): a free-running hardware counter that provides
continuous timekeeping for the SoC, and is functional with a GCC TSC AHB
config clock and a global counter clock. The TSC counter resolution and
supported functionalities vary across SoC variants.
- Event Timestamp Unit (ETU): an optional block that captures TSC counter
timestamps against external hardware events. Each ETU slice binds a
slice identifier to an external event selector, and the ETU additionally
requires its own clock, pinctrl along with either a per-slice interrupt
(QDU1000) or a single summary interrupt across all ETU slices (Lemans
and Monaco).
+------------------------------------------------+ +------------------+
| Global clock controller - TSC AHB/CNTR/ETU CLK | | EVENT_IN[0:15] |
+------------------------------------------------+ +------------------+
| |
v v
+----------------------------------------------------------------------+
| Timestamp Counter Subsystem (TSCSS) |
| |
| +----------------------------------------------+ |
| +------------+ | Event Timestamp Unit (ETU) | |
| | Timestamp | | 0x01C90000-0x01C9FFFF | |
| | Counter | | +------------------------------------------+ | |
| | (TSC) | | | ETU Slices | | |
| | | | | [Slice 0] [Slice 1] [...] [Slice 15] | | |
| | 0x1C80000 | | | 0x1C90000 0x1C91000 0x1C9F000 | | |
| +------------+ | | | | |
| | +-----------+------------------------------+ | |
| +-------------|--------------------+-----------+ |
| | | |
+---------------------------------|--------------------|---------------+
| |
v v
+----------------------------------------+
| per-slice IRQ (OR) summary IRQ |
| (QDU1000) (Lemans) |
+----------------------------------------+
|
v
+-----------------------------+
| Interrupt Controller |
+-----------------------------+
The address offsets shown in the diagram above are specific to Qualcomm
Lemans SoC.
This series currently covers only the TSC block driver functionality; ETU
driver support will follow in a later series.
Signed-off-by: Imran Shaik <redacted>
---
Imran Shaik (6):
dt-bindings: ptp: Document the TSCSS on Qualcomm Lemans and Monaco SoCs
dt-bindings: ptp: Document TSCSS hardware on Qualcomm QDU1000 SoC
ptp: qcom: Add PTP driver for the Qualcomm TSC hardware
arm64: defconfig: Enable Qualcomm TSC driver
arm64: dts: qcom: lemans: Add support for TSCSS node
arm64: dts: qcom: qdu1000: Add support for TSCSS node
.../devicetree/bindings/ptp/qcom,lemans-tscss.yaml | 198 ++++++++++
.../bindings/ptp/qcom,qdu1000-tscss.yaml | 187 ++++++++++
arch/arm64/boot/dts/qcom/lemans.dtsi | 11 +
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 11 +
arch/arm64/configs/defconfig | 1 +
drivers/ptp/Kconfig | 10 +
drivers/ptp/Makefile | 1 +
drivers/ptp/ptp_qcom_tsc.c | 413 +++++++++++++++++++++
8 files changed, 832 insertions(+)
---
base-commit: c5e32e86ca02b003f86e095d379b38148999293d
change-id: 20260705-tscss-441d844c1ee7
Best regards,
--
Imran Shaik [off-list ref]