Re: [PATCH net-next 1/2] net: macb: remove unused ENST Q0/Q1 time register defines
From: Nicolai Buchwitz <hidden>
Date: 2026-07-24 19:41:01
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Hi Vineeth On 24.7.2026 06:32, Vineeth Karumanchi wrote:
quoted hunk ↗ jump to hunk
The ENST start/on/off time register definitions for Q0 and Q1 are not referenced anywhere in the driver. The driver calculates these register addresses from the ENST base offset and the queue index instead of using fixed defines, removing the unused macros. Signed-off-by: Vineeth Karumanchi <redacted> --- drivers/net/ethernet/cadence/macb.h | 6 ------ 1 file changed, 6 deletions(-)diff --git a/drivers/net/ethernet/cadence/macb.hb/drivers/net/ethernet/cadence/macb.h index 2de56017ee0d..a11052565436 100644--- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h@@ -184,12 +184,6 @@ #define GEM_DCFG8 0x029C /* Design Config 8 */ #define GEM_DCFG10 0x02A4 /* Design Config 10 */ #define GEM_DCFG12 0x02AC /* Design Config 12 */ -#define GEM_ENST_START_TIME_Q0 0x0800 /* ENST Q0 start time */ -#define GEM_ENST_START_TIME_Q1 0x0804 /* ENST Q1 start time */ -#define GEM_ENST_ON_TIME_Q0 0x0820 /* ENST Q0 on time */ -#define GEM_ENST_ON_TIME_Q1 0x0824 /* ENST Q1 on time */ -#define GEM_ENST_OFF_TIME_Q0 0x0840 /* ENST Q0 off time */ -#define GEM_ENST_OFF_TIME_Q1 0x0844 /* ENST Q1 off time */ #define GEM_ENST_CONTROL 0x0880 /* ENST control register */ #define GEM_USX_CONTROL 0x0A80 /* High speed PCS control register */ #define GEM_USX_STATUS 0x0A88 /* High speed PCS status register */
Reviewed-by: Nicolai Buchwitz <redacted> Thanks Nicolai