[PATCH v3 01/11] net/mlx5: Add IFC structures for CQE and WQE
From: Jason Gunthorpe <jgg@nvidia.com>
Date: 2026-07-16 17:03:34
Also in:
kvm, linux-kselftest, linux-patches, linux-rdma, llvm
Subsystem:
mellanox mlx5 ib driver, mellanox mlx5 core vpi driver, the rest · Maintainers:
Leon Romanovsky, Saeed Mahameed, Tariq Toukan, Mark Bloch, Linus Torvalds
Building the WQE and CQE using the IFC system is easier than with a C layout struct. Add definitions for their layout. Structs for: - wqe_ctrl_seg_bits (16B): WQE control segment - wqe_raddr_seg_bits (16B): RDMA remote address segment - wqe_data_seg_bits (16B): data segment - cqe64_bits (64B): 64-byte CQE with error syndrome union The VFIO mlx5 selftest will use these. Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> --- include/linux/mlx5/mlx5_ifc.h | 55 +++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 695c86ee6d7a3f..a83eb731764a0f 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h@@ -5979,6 +5979,61 @@ struct mlx5_ifc_cqe_error_syndrome_bits { u8 syndrome[0x8]; }; +struct mlx5_ifc_wqe_ctrl_seg_bits { + u8 opmod[0x8]; + u8 wqe_index[0x10]; + u8 opcode[0x8]; + + u8 qp_or_sq[0x18]; + u8 reserved_at_38[0x2]; + u8 ds[0x6]; + + u8 signature[0x8]; + u8 reserved_at_48[0x10]; + u8 fm[0x3]; + u8 reserved_at_5b[0x1]; + u8 ce[0x2]; + u8 se[0x1]; + u8 reserved_at_5f[0x1]; + + u8 imm[0x20]; +}; + +struct mlx5_ifc_wqe_raddr_seg_bits { + u8 raddr[0x40]; + + u8 rkey[0x20]; + u8 reserved_at_60[0x20]; +}; + +struct mlx5_ifc_wqe_data_seg_bits { + u8 reserved_at_0[0x1]; + u8 byte_count[0x1f]; + + u8 lkey[0x20]; + + u8 addr[0x40]; +}; + +struct mlx5_ifc_cqe64_bits { + u8 reserved_at_0[0x1a0]; + + union { + u8 reserved_at_1a0[0x20]; + struct mlx5_ifc_cqe_error_syndrome_bits error_syndrome; + }; + + u8 send_wqe_opcode[0x8]; + u8 qpn_or_dctn_or_flow_tag[0x18]; + + u8 wqe_counter[0x10]; + u8 signature[0x8]; + u8 opcode[0x4]; + u8 cqe_format[0x2]; + u8 se[0x1]; + u8 owner[0x1]; +}; + struct mlx5_ifc_qp_context_extension_bits { u8 reserved_at_0[0x60];
--
2.43.0