Re: [PATCH v2 08/18] dt-bindings: clock: mediatek: Add MT8189 clocks

On 7/9/26 15:42, Louis-Alexis Eyraud wrote:

Add dt schema and IDs for the clocks of MediaTek MT8189 SoC.
The MT8189 clock IP provide clock control for main system
(apmixedsys, topcksys and vlpcksys) and subsys (eg. peri, scp,
ufs...).

Also, add compatible for frequency hopping and spread spectrum clock
functionality and reset controller header file for MT8189 UFS reset
controller support.

Co-developed-by: Irving-CH Lin <redacted>
Signed-off-by: Irving-CH Lin <redacted>
Signed-off-by: Louis-Alexis Eyraud <redacted>

Both the commit description and title are misleading, as in, you're not adding
MT8189 clocks, but *both* clocks *and* resets.

Fix it please.

After which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

---
  .../bindings/clock/mediatek,mt8186-clock.yaml      |  15 +
  .../bindings/clock/mediatek,mt8186-fhctl.yaml      |   1 +
  .../bindings/clock/mediatek,mt8186-sys-clock.yaml  |   5 +
  include/dt-bindings/clock/mediatek,mt8189-clk.h    | 433 +++++++++++++++++++++
  include/dt-bindings/reset/mediatek,mt8189-resets.h |  17 +
  5 files changed, 471 insertions(+)