On Tue, 30 Jun 2026 08:17:06 +0530 Ratheesh Kannoth wrote:

Marvell OcteonTX2 switch hardware is capable of accelerating L2, L3, and
flow. When representors are enabled through devlink, a logical port is
created in switch hardware for each representor device.

There's a number of allocations here which are missing a NULL check.

I'm sure sashiko will also have semi-infinite number of complaints,
so please check that yourself.
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pw-bot: cr