On 30/6/2026 10:04 pm, Maxime Chevallier wrote:

On 6/30/26 16:02, Andrew Lunn wrote:

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On Tue, Jun 30, 2026 at 06:31:08AM -0700, muhammad.nazim.amirul.nazle.asmade@altera.com wrote:

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From: Nazim Amirul <redacted>

Russell King's commit de696c63c1dc ("net: stmmac: socfpga: convert to
use phy_interface") replaced mac_interface with phy_interface in
socfpga_get_plat_phymode(), noting that no upstream DTS files set the
"mac-mode" property, making the two values identical.

The Agilex5 SoCDK TSN Config2 board is an exception: its gmac1 TSN
port uses GMII internally in the MAC while the PHY-side interface is
RGMII, so mac-mode and phy-mode differ.

Maybe you need to represent the hardware block which magically
converts GMII to RGMII in DT?

Yeah that's what we have on CycloneV, and we force the INTF_SEL to GMII if that
HW block is present. I wonder if there's the same on agileX5 ?

Hi Maxime, Andrew

Yes, Agilex5 has the same concept. The GMII-to-RGMII converter is a 
Quartus soft IP instantiated in the FPGA fabric — equivalent to the 
CycloneV EMAC splitter. The XGMAC outputs GMII signals to the FPGA 
fabric, the soft IP converts them to RGMII, and the RGMII signals then 
go through the FPGA HVIO pins to the external Marvell 88E1512 PHY.

BR,
Nazim>

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	 Andrew