Is there any prior art wrt enabling/disabling the PHYs (not necessarily
clocks specifically, but say power supplies) at runtime?
A quick grep only points to this very driver, which gets the regulator
during probe, enables it and never turns it off
Not really. PHYs which care about power do their own power
management. They can sense the line and know if there is anything
plugged in the other end, and only then enable parts of the PHY. The
difference between an active and sleeping 1G PHY should be around 1
Watt. I don't think you will save too much more by turning off the
clocks.
Andrew