[PATCH v4 2/4] dt-bindings: net: qca,ar803x: Add clocks for IPQ5018 PHY
From: George Moussalem via B4 Relay <devnull+george.moussalem.outlook.com@kernel.org>
Date: 2026-06-08 05:09:26
Also in:
b4-sent, linux-arm-msm, linux-devicetree, lkml
Subsystem:
ethernet phy library, networking drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
From: George Moussalem <redacted> Further testing revealed that the RX and TX clocks of the IPQ5018 PHY need to be explicitly enabled. As such, add the required clocks to the schema. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: George Moussalem <redacted> --- Documentation/devicetree/bindings/net/qca,ar803x.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml
index 7ae5110e7aa2..53f648c4135f 100644
--- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml
+++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml@@ -28,6 +28,16 @@ allOf: reg: const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC + clocks: + items: + - description: RX clock + - description: TX clock + + clock-names: + items: + - const: rx + - const: tx + resets: items: - description:
@@ -42,6 +52,11 @@ allOf: of this PHY are directly connected to an RJ45 connector. type: boolean + required: + - clocks + - clock-names + - resets + properties: compatible: enum:
@@ -162,6 +177,7 @@ examples: }; }; - | + #include <dt-bindings/clock/qcom,gcc-ipq5018.h> #include <dt-bindings/reset/qcom,gcc-ipq5018.h> mdio {
@@ -172,6 +188,9 @@ examples: compatible = "ethernet-phy-id004d.d0c0"; reg = <7>; + clocks = <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names = "rx", "tx"; resets = <&gcc GCC_GEPHY_MISC_ARES>; }; };
--
2.53.0