[PATCH net-next 05/12] net: stmmac: dwxgmac2: Add multi MSI interrupt mode
From: Alex Elder <hidden>
Date: 2026-05-01 15:54:46
Also in:
bpf, linux-arm-msm, linux-devicetree, linux-gpio, lkml
Subsystem:
networking drivers, stmmac ethernet driver, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
From: Daniel Thompson <redacted> Currently there are no XGMAC platforms integrated using the multi MSI interrupt mode. In other words no existing driver sets both DWMAC_CORE_XGMAC and STMMAC_FLAG_MULTI_MSI_EN. In order to support systems that do enable both options (such as the Toshiba TC9564 whose driver is currently being developed) we need to add logic to the XGMAC DMA callbacks. Happily we can simply replicate similar code from GMAC4. Let's do that! Signed-off-by: Daniel Thompson <redacted> Signed-off-by: Alex Elder <redacted> --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 ++ drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 8 ++++++++ 2 files changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
index 51943705a2b03..9b0b5cc619556 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h@@ -320,6 +320,8 @@ /* DMA Registers */ #define XGMAC_DMA_MODE 0x00003000 #define XGMAC_SWR BIT(0) +#define XGMAC_INTM_MASK GENMASK(13, 12) +#define XGMAC_INTM_MODE1 0x1 #define XGMAC_DMA_SYSBUS_MODE 0x00003004 #define XGMAC_WR_OSR_LMT GENMASK(29, 24) #define XGMAC_RD_OSR_LMT GENMASK(21, 16)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
index 03437f1cf3df3..a84601ac32153 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c@@ -31,6 +31,14 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr, value |= XGMAC_EAME; writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); + + value = readl(ioaddr + XGMAC_DMA_MODE); + + if (dma_cfg->multi_msi_en) + value = u32_replace_bits(value, XGMAC_INTM_MODE1, + XGMAC_INTM_MASK); + + writel(value, ioaddr + XGMAC_DMA_MODE); } static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv,
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2.51.0