[PATCH net-next v5 08/14] net: renesas: rswitch: add locking for agent clock control
flat view
STALE139d
From: Michael Dege <hidden>
Date: 2026-05-22 12:13:24
Also in:
linux-renesas-soc, lkml
Subsystem:
networking drivers, renesas ethernet switch driver, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Revision v5 of 5 in this series.
Revisions (5)
RCEC and RCDC clock registers are shared by all ports (ETHA and GWCA), there is a potential risk of a race condition leading to an undefined state. Signed-off-by: Michael Dege <redacted> --- drivers/net/ethernet/renesas/rswitch.h | 3 +++ drivers/net/ethernet/renesas/rswitch_main.c | 17 +++++++++++++++-- 2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/rswitch.h b/drivers/net/ethernet/renesas/rswitch.h
index 5feeb555e9a8..f85dd96a9bfb 100644
--- a/drivers/net/ethernet/renesas/rswitch.h
+++ b/drivers/net/ethernet/renesas/rswitch.h@@ -1089,6 +1089,7 @@ struct rswitch_etha { unsigned int index; void __iomem *addr; void __iomem *coma_addr; + struct rswitch_private *priv; bool external_phy; struct mii_bus *mii; phy_interface_t phy_interface;
@@ -1207,6 +1208,8 @@ struct rswitch_private { struct list_head port_list; spinlock_t lock; /* lock interrupt registers' control */ + spinlock_t agent_lock; /* rswitch agent clock control */ + struct clk *clk; bool etha_no_runtime_change;
diff --git a/drivers/net/ethernet/renesas/rswitch_main.c b/drivers/net/ethernet/renesas/rswitch_main.c
index 20ac8f3b9357..fc80c65c2131 100644
--- a/drivers/net/ethernet/renesas/rswitch_main.c
+++ b/drivers/net/ethernet/renesas/rswitch_main.c@@ -173,8 +173,12 @@ int rswitch_gwca_change_mode(struct rswitch_private *priv, { int ret; - if (!rswitch_agent_clock_is_enabled(priv->addr, priv->gwca.index)) + if (!rswitch_agent_clock_is_enabled(priv->addr, priv->gwca.index)) { + spin_lock(&priv->agent_lock); rswitch_agent_clock_ctrl(priv->addr, priv->gwca.index, 1); + spin_lock(&priv->agent_lock); + } + iowrite32(GWMC_OPC_DISABLE, priv->addr + GWMC); ret = rswitch_reg_wait(priv->addr, GWMS, GWMS_OPS_MASK, GWMC_OPC_DISABLE);
@@ -182,7 +186,9 @@ int rswitch_gwca_change_mode(struct rswitch_private *priv, return ret; if (mode == GWMC_OPC_DISABLE) { + spin_lock(&priv->agent_lock); rswitch_agent_clock_ctrl(priv->addr, priv->gwca.index, 0); + spin_unlock(&priv->agent_lock); return ret; }
@@ -1183,15 +1189,21 @@ int rswitch_etha_change_mode(struct rswitch_etha *etha, { int ret; - if (!rswitch_agent_clock_is_enabled(etha->coma_addr, etha->index)) + if (!rswitch_agent_clock_is_enabled(etha->coma_addr, etha->index)) { + spin_lock(ða->priv->agent_lock); rswitch_agent_clock_ctrl(etha->coma_addr, etha->index, 1); + spin_unlock(ða->priv->agent_lock); + } + iowrite32(EAMC_OPC_DISABLE, etha->addr + EAMC); ret = rswitch_reg_wait(etha->addr, EAMS, EAMS_OPS_MASK, EAMC_OPC_DISABLE); if (ret < 0) return ret; if (mode == EAMC_OPC_DISABLE) { + spin_lock(ða->priv->agent_lock); rswitch_agent_clock_ctrl(etha->coma_addr, etha->index, 0); + spin_unlock(ða->priv->agent_lock); return ret; }
@@ -2010,6 +2022,7 @@ static void rswitch_etha_init(struct rswitch_private *priv, unsigned int index) etha->index = index; etha->addr = priv->addr + RSWITCH_ETHA_OFFSET + index * RSWITCH_ETHA_SIZE; etha->coma_addr = priv->addr; + etha->priv = priv; /* MPIC.PSMCS = (clk [MHz] / (MDC frequency [MHz] * 2) - 1. * Calculating PSMCS value as MDC frequency = 2.5MHz. So, multiply
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2.43.0