Report device_stall_critical_watermark_cnt as tx_pause_storm_events in
the ethtool_pause_stats struct. This counter tracks pause storm error
events which indicate the NIC has been sending pause frames for an
extended period due to a stall.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Mohsin Bashir <redacted>
---
  .../ethernet/mellanox/mlx5/core/en_stats.c    | 25 +++++++++++++++++++
  1 file changed, 25 insertions(+)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
index a8af84fc9763..2fe779c164e4 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c

@@ -916,6 +916,23 @@ static int mlx5e_stats_get_ieee(struct mlx5_core_dev *mdev,
  				    sz, MLX5_REG_PPCNT, 0, 0);
  }
  
+static int mlx5e_stats_get_per_prio(struct mlx5_core_dev *mdev,
+				    u32 *ppcnt_per_prio)
+{
+	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {};
+	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
+
+	if (!(MLX5_CAP_PCAM_FEATURE(mdev, pfcc_mask) &&
+	      MLX5_CAP_DEBUG(mdev, stall_detect)))
+		return -EOPNOTSUPP;
+
+	MLX5_SET(ppcnt_reg, in, local_port, 1);
+	MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP);
+	MLX5_SET(ppcnt_reg, in, prio_tc, 0);

+	return mlx5_core_access_reg(mdev, in, sz, ppcnt_per_prio, sz,
+				    MLX5_REG_PPCNT, 0, 0);
+}
+
  void mlx5e_stats_pause_get(struct mlx5e_priv *priv,
  			   struct ethtool_pause_stats *pause_stats)
  {

@@ -933,6 +950,14 @@ void mlx5e_stats_pause_get(struct mlx5e_priv *priv,
  		MLX5E_READ_CTR64_BE_F(ppcnt_ieee_802_3,
  				      eth_802_3_cntrs_grp_data_layout,
  				      a_pause_mac_ctrl_frames_received);
+
+	if (mlx5e_stats_get_per_prio(mdev, ppcnt_ieee_802_3))
+		return;
+
+	pause_stats->tx_pause_storm_events =
+		MLX5E_READ_CTR64_BE_F(ppcnt_ieee_802_3,
+				      eth_per_prio_grp_data_layout,
+				      device_stall_critical_watermark_cnt);
  }
  
  void mlx5e_stats_eth_phy_get(struct mlx5e_priv *priv,