[Proposal,Question - refresh] ACPI representation of DPLL/Ethernet dependencies (SyncE)
From: Ivan Vecera <ivecera@redhat.com>
Date: 2026-01-21 14:43:11
Also in:
linux-acpi
Hi Andy, Rafael and others, (based on the previous thread [1] - now involving more people from networking and DPLL) Thank you for the insights on _CRS and ClockInput. I think we have circled the issue enough to identify the core disconnect: * While the physical signals on these wires are indeed clocks (10MHz, etc.), from the OS driver perspective, this is not a "Clock Resource" issue. The NIC driver does not need to gate, rate-set, or power-manage these clocks (which is what _CRS/ClockInput implies). * Instead, the NIC driver simply needs a Topology Map. It needs to know: "My Port 0 (Consumer) is physically wired to DPLL Pin 3 (Provider)." The NIC driver needs this Pin Index (3) specifically to report it via the RtNetlink. This allows the userspace daemon (e.g., synce4l or linux-ptp) to see the relationship and decide to configure the DPLL via the DPLL Netlink API to lock onto that specific input. A generic ClockInput resource in _CRS is anonymous and unordered. The OS abstracts it into a handle, but it fails to convey the specific pin index required for this userspace reporting. Since ACPI lacks a native "Graph/Topology" object for inter-device dependencies of this nature, and _CRS obscures the index information required by userspace, I propose we treat _DSD properties as the de-facto standard [2] for modeling SyncE topology in ACPI. To avoid the confusion Andy mentioned regarding "Clock Bindings" in ACPI, I suggest we explicitly define a schema using 'dpll-' prefixed properties. This effectively decouples it from the Clock subsystem expectations and treats it purely as a wiring map. Proposed ACPI Representation with proposed documentation [3] If the ACPI maintainers and Netdev maintainers agree that this _DSD-based topology map is the acceptable "Pragmatic Standard" for this feature, I will document this schema in the kernel documentation and proceed with the implementation. This solves the immediate need for an upcoming Intel SyncE enabled platform and provides a consistent blueprint for other vendors implementing SyncE on ACPI. Regards, Ivan [1] https://lore.kernel.org/linux-acpi/3bf214b9-8691-44f7-aa13-8169276a6c2b@redhat.com/ (local) [2] https://docs.kernel.org/firmware-guide/acpi/dsd/data-node-references.html [3] https://gist.github.com/ivecera/964c25f47f688f44ec70984742cf7fbd