Re: [PATCH v9 net-next 02/15] gro: flushing when CWR is set negatively affects AccECN

On Mon, Jan 19, 2026 at 7:59 PM [off-list ref] wrote:

From: Ilpo Järvinen <ij@kernel.org>

As AccECN may keep CWR bit asserted due to different
interpretation of the bit, flushing with GRO because of
CWR may effectively disable GRO until AccECN counter
field changes such that CWR-bit becomes 0.

There is no harm done from not immediately forwarding the
CWR'ed segment with RFC3168 ECN.

Reviewed-by: Eric Dumazet <edumazet@google.com>