Re: [PATCH RFC v2 4/4] stmmac: s32: enable support for Multi-IRQ mode
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From: Matthias Brugger <mbrugger@suse.com>
Date: 2026-01-21 16:16:58
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On 21/01/2026 15:23, Jan Petrous via B4 Relay wrote:
From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
To get enabled Multi-IRQ mode, the driver checks:
1) property of 'snps,mtl-xx-config' subnode
defines 'snps,xx-queues-to-use' bigger then one, ie:
ethernet@4033c000 {
compatible = "nxp,s32g2-dwmac";
...
snps,mtl-rx-config = <&mtl_rx_setup>;
...
mtl_rx_setup: rx-queues-config {
snps,rx-queues-to-use = <2>;
};
2) queue based IRQs are set, ie:
ethernet@4033c000 {
compatible = "nxp,s32g2-dwmac";
...
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 0: tx, rx */
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 1: tx, rx */
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq",
"tx-queue-0", "rx-queue-0",
"tx-queue-1", "rx-queue-1";
If those prerequisites are met, the driver switch to Multi-IRQ mode,
using per-queue IRQs for rx/tx data pathr:
[ 1.387045] s32-dwmac 4033c000.ethernet: Multi-IRQ mode (per queue IRQ) selected
Now the driver owns all queues IRQs:
root@s32g399aevb3:~# grep eth /proc/interrupts
29: 0 0 0 0 0 0 0 0 GICv3 89 Level eth0:mac
30: 0 0 0 0 0 0 0 0 GICv3 91 Level eth0:rx-0
31: 0 0 0 0 0 0 0 0 GICv3 93 Level eth0:rx-1
32: 0 0 0 0 0 0 0 0 GICv3 95 Level eth0:rx-2
33: 0 0 0 0 0 0 0 0 GICv3 97 Level eth0:rx-3
34: 0 0 0 0 0 0 0 0 GICv3 99 Level eth0:rx-4
35: 0 0 0 0 0 0 0 0 GICv3 90 Level eth0:tx-0
36: 0 0 0 0 0 0 0 0 GICv3 92 Level eth0:tx-1
37: 0 0 0 0 0 0 0 0 GICv3 94 Level eth0:tx-2
38: 0 0 0 0 0 0 0 0 GICv3 96 Level eth0:tx-3
39: 0 0 0 0 0 0 0 0 GICv3 98 Level eth0:tx-4
Otherwise, if one of the prerequisite don't met, the driver
continue with MAC IRQ mode:
[ 1.387045] s32-dwmac 4033c000.ethernet: MAC IRQ mode selected
And only MAC IRQ will be attached:
root@s32g399aevb3:~# grep eth /proc/interrupts
29: 0 0 0 0 0 0 0 0 GICv3 89 Level eth0:mac
What represents the original MAC IRQ mode and is fully backward
compatible.
Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>Reviewed-by: Matthias Brugger <mbrugger@suse.com>
quoted hunk ↗ jump to hunk
--- drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c index 5a485ee98fa7..823700219534 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c@@ -2,7 +2,7 @@ /* * NXP S32G/R GMAC glue layer * - * Copyright 2019-2024 NXP + * Copyright 2019-2026 NXP * */@@ -149,6 +149,17 @@ static int s32_dwmac_probe(struct platform_device *pdev) plat->core_type = DWMAC_CORE_GMAC4; plat->pmt = 1; plat->flags |= STMMAC_FLAG_SPH_DISABLE; + + /* Check for multi-IRQ config. Assumption: symetrical rx/tx queues */ + if (plat->rx_queues_to_use > 1 && + (res.rx_irq[0] >= 0 || res.tx_irq[0] >= 0)) { + plat->flags |= STMMAC_FLAG_MULTI_MSI_EN; + dev_info(dev, "Multi-IRQ mode (per queue IRQ) selected\n"); + } else { + dev_info(dev, "MAC IRQ mode selected\n"); + } + + plat->flags |= STMMAC_FLAG_MULTI_MSI_EN; plat->rx_fifo_size = 20480; plat->tx_fifo_size = 20480;