Re: [v2,2/5] net: phy: realtek: simplify C22 reg access via MDIO_MMD_VEND2
From: Jakub Kicinski <kuba@kernel.org>
Date: 2026-01-17 23:55:16
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On Sat, 17 Jan 2026 23:40:36 +0000 Daniel Golle wrote:
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@@ -1156,7 +1156,8 @@ static int rtlgen_read_status(struct phy_device *phydev) if (!phydev->link) return 0; - val = phy_read(phydev, RTL_PHYSR); + val = phy_read_paged(phydev, RTL822X_VND2_TO_PAGE(RTL_VND2_PHYSR), + RTL822X_VND2_TO_PAGE_REG(RTL_VND2_PHYSR));This changes rtlgen_read_status() from reading C22 register MII_RESV2 (0x1a) directly to using paged access at page 0xa43, register 18.Yeah. Just that this is not part of the series submitted. It's rather a (halucinated) partial revert of [v2,4/5] net: phy: realtek: demystify PHYSR register location
Oh wow, that's a first. No idea how this happened. Is the chunk if hallucinated from another WIP patch set? Chris, FWIW this is before we added lore indexing so I don't think it got it from the list. Is it possible that semcode index is polluted by previous submissions? Still, even if, it's weird that it'd hallucinate a chunk of a patch. Link to the review: https://netdev-ai.bots.linux.dev/ai-review.html?id=67c40fdf-dd15-4ac1-8571-9425d9a950b4 -- pw-bot: under-review