[PATCH v2] net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628
From: Joris Vaisvila <hidden>
Date: 2026-01-06 05:29:34
Subsystem:
mediatek ethernet driver, networking drivers, the rest · Maintainers:
Felix Fietkau, Lorenzo Bianconi, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
The MT7628 does not expose MAC control registers. Writes to these
registers corrupt the ESW VLAN configuration. Existing drivers
never use the affected features, so this went unnoticed.
This patch skips MCR register reads and writes on MT7628, preventing
invalid register access.
Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support")
Signed-off-by: Joris Vaisvila <redacted>
---
v2:
- Add missing Fixes tag
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index e68997a29191..2fae6bd368a6 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c@@ -699,6 +699,9 @@ static int mtk_mac_finish(struct phylink_config *config, unsigned int mode, struct mtk_eth *eth = mac->hw; u32 mcr_cur, mcr_new; + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) + return 0; + /* Enable SGMII */ if (interface == PHY_INTERFACE_MODE_SGMII || phy_interface_mode_is_8023z(interface))
@@ -724,6 +727,9 @@ static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode, struct mtk_mac *mac = container_of(config, struct mtk_mac, phylink_config); + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SOC_MT7628)) + return; + if (!mtk_interface_mode_is_xgmii(mac->hw, interface)) { /* GMAC modes */ mtk_m32(mac->hw,
@@ -815,6 +821,9 @@ static void mtk_gdm_mac_link_up(struct mtk_mac *mac, { u32 mcr; + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SOC_MT7628)) + return; + mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); mcr &= ~(MAC_MCR_SPEED_100 | MAC_MCR_SPEED_1000 | MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_TX_FC |
@@ -4357,9 +4366,11 @@ static void mtk_prepare_for_reset(struct mtk_eth *eth) mtk_w32(eth, 0, MTK_FE_INT_ENABLE); /* force link down GMAC */ - for (i = 0; i < 2; i++) { - val = mtk_r32(eth, MTK_MAC_MCR(i)) & ~MAC_MCR_FORCE_LINK; - mtk_w32(eth, val, MTK_MAC_MCR(i)); + if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { + for (i = 0; i < 2; i++) { + val = mtk_r32(eth, MTK_MAC_MCR(i)) & ~MAC_MCR_FORCE_LINK; + mtk_w32(eth, val, MTK_MAC_MCR(i)); + } } }
--
2.52.0