[PATCH v6 4/5] PCI: mediatek: Use generic MACRO for TPVPERL delay
From: Christian Marangi <ansuelsmth@gmail.com>
Date: 2025-10-20 11:11:46
Also in:
linux-arm-kernel, linux-devicetree, linux-mediatek, linux-pci, lkml
Subsystem:
pci native host bridge and endpoint drivers, pci subsystem, pcie driver for mediatek, the rest · Maintainers:
Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Ryder Lee, Linus Torvalds
Use the generic PCIe MACRO for TPVPERL delay to wait for clock and power stabilization after PERST# Signal instead of the raw value of 100 ms. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> --- drivers/pci/controller/pcie-mediatek.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index cbffa3156da1..313da61a0b8a 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c@@ -697,12 +697,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) */ writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL); - /* - * Described in PCIe CEM specification sections 2.2 (PERST# Signal) and - * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should - * be delayed 100ms (TPVPERL) for the power and clock to become stable. - */ - msleep(100); + msleep(PCIE_T_PVPERL_MS); /* De-assert PHY, PE, PIPE, MAC and configuration reset */ val = readl(port->base + PCIE_RST_CTRL);
--
2.51.0