[PATCH v2 1/5] net: cadence: macb: Set upper 32bits of DMA ring buffer
From: Stanimir Varbanov <hidden>
Date: 2025-08-22 09:40:31
Also in:
linux-arm-kernel, linux-devicetree, lkml, stable
Subsystem:
atmel macb ethernet driver, networking drivers, the rest · Maintainers:
Théo Lebrun, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
In case of rx queue reset and 64bit capable hardware, set the upper
32bits of DMA ring buffer address.
Cc: stable@vger.kernel.org # v4.6+
Fixes: 9ba723b081a2 ("net: macb: remove BUG_ON() and reset the queue to handle RX errors")
Credits-to: Phil Elwell [off-list ref]
Credits-to: Jonathan Bell [off-list ref]
Signed-off-by: Stanimir Varbanov <redacted>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
v1 -> v2:
- Added credits.
- Use lower_32_bits() for RBQP register writes for consistency (Nicolas).
- Added Fixes tag.
drivers/net/ethernet/cadence/macb_main.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index ce95fad8cedd..36717e7e5811 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c@@ -1634,7 +1634,11 @@ static int macb_rx(struct macb_queue *queue, struct napi_struct *napi, macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE)); macb_init_rx_ring(queue); - queue_writel(queue, RBQP, queue->rx_ring_dma); + queue_writel(queue, RBQP, lower_32_bits(queue->rx_ring_dma)); +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT + if (bp->hw_dma_cap & HW_DMA_CAP_64B) + macb_writel(bp, RBQPH, upper_32_bits(queue->rx_ring_dma)); +#endif macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
--
2.47.0