On 2025-08-20 00:20, Andrew Lunn wrote:

quoted

  static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
  {
  	struct device *dev = &ethqos->pdev->dev;
-	int phase_shift;
+	int phase_shift = 0;
  	int loopback;
  
  	/* Determine if the PHY adds a 2 ns TX delay or the MAC handles it */
-	if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID ||
-	    ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID)
-		phase_shift = 0;
-	else
+	if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
  		phase_shift = RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN;

Does this one setting control both RX and TX delays? The hardware
cannot support 2ns delay on TX, but 0ns on RX? Or 2ns on RX but 0ns on
TX?

This setting is only for Tx delay. Rx delays are taken care separately 
with DLL delays.

	Andrew

-- 
Best Regards,
Yijie