Hello Jiaxun,

On Mon Jun 30, 2025 at 3:35 PM CEST, Jiaxun Yang wrote:

在2025年6月27日周五 上午10:09，Théo Lebrun写道：

quoted

Both Cadence GEM Ethernet controllers on EyeQ5 are hardwired through CM3
IO Coherency Units (IOCU). For DMA coherent accesses, BIT(36) must be
set in DMA addresses.

Just quick question, it seems like this special driver is only applying a
fixed offset (1 << 36) to the DMA physical address, can we achieve that with dma-ranges
property in DeviceTree?

I belive:

dma-coherent;
             # Bus addr       # Phys  # Size
dma-ranges = <0x10 0x00000000 0x0 0x0 0x10 0>;

Will do the job.

This is perfect! Can confirm it works just fine. When you are stuck in
an issue for too long you don't think about broadening your viewpoint.

Thanks,

--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com