On Tue, Jul 22, 2025 at 08:54:23PM +0800, Jijie Shao wrote:

The SMMU engine on HIP09 chip has a hardware issue.
SMMU pagetable prefetch features may prefetch and use a invalid PTE
even the PTE is valid at that time. This will cause the device trigger
fake pagefaults. The solution is to avoid prefetching by adding a
SYNC command when smmu mapping a iova. But the performance of nic has a
sharp drop. Then we do this workaround, always enable tx bounce buffer,
avoid mapping/unmapping on TX path.

This issue only affects HNS3, so we always enable
tx bounce buffer when smmu enabled to improve performance.

Fixes: 295ba232a8c3 ("net: hns3: add device version to replace pci revision")
Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
ChangeLog:
v1 -> v2:
  - Split this patch, omits the ethtool changes,
    ethtool changes will be sent to net-next, suggested by Simon Horman
  v1: https://lore.kernel.org/all/20250702130901.2879031-1-shaojijie@huawei.com/ (local)

Thanks for breaking this out.

Reviewed-by: Simon Horman <horms@kernel.org>