On Thu, 3 Jul 2025 11:58:50 +0000 Parav Pandit wrote:

quoted

In my head subfunctions are a way of configuring a PCIe PASID ergo they
_only_ make sense in context of DMA.  

SF DMA is on the parent PCI device.

SIOV_R2 will have its own PCI RID which is ratified or getting ratified.
When its done, SF (as SIOV_R2 device) instantiation can be extended
with its own PCI RID. At that point they can be mapped to a VM.

AFAIU every PCIe transaction for a queue with a PASID assigned
should have a PASID prefix. Why is a different RID necessary?
CPUs can't select IOMMU context based on RID+PASID?