Re: [PATCH 4/5] arm64: dts: allwinner: a100: Add EMAC support
From: Andre Przywara <andre.przywara@arm.com>
Date: 2025-07-04 23:34:13
Also in:
linux-arm-kernel, linux-devicetree, linux-gpio, linux-sunxi, lkml
On Thu, 26 Jun 2025 10:09:22 +0200 Paul Kocialkowski [off-list ref] wrote: Hi,
The Allwinner A100/A133 Ethernet MAC (EMAC) is compatible with the A64 one and needs access to the syscon register for control of the top-level integration of the unit.
as mentioned before, this would benefit from using "emac0", to signify that there is a second MAC, but otherwise this matches what I found in the manual and could test, so with the 0 suffix added:
Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre
quoted hunk ↗ jump to hunk
--- .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+)diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 1c4e71b32911..205faa90d37b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi@@ -420,6 +420,26 @@ i2c3: i2c@5002c00 { #size-cells = <0>; }; + emac: ethernet@5020000 { + compatible = "allwinner,sun50i-a100-emac", + "allwinner,sun50i-a64-emac"; + reg = <0x5020000 0x10000>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + syscon = <&syscon>; + status = "disabled"; + + mdio: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + ths: thermal-sensor@5070400 { compatible = "allwinner,sun50i-a100-ths"; reg = <0x05070400 0x100>;