On Tue, Mar 4, 2025, at 05:09, Richard Cochran wrote:

On Mon, Mar 03, 2025 at 09:50:01AM +0200, Andy Shevchenko wrote:

quoted

Perhaps it's still good to have a comment, but rephrase it that the code is
questionable depending on the HW behaviour that needs to be checked.

IIRC both ixp4xx and the PCH are the same design and latch high reg on
read of low.

Ok, if that's a common thing, let's assume that the drivers are
all correct for the respective hardware and discard my patch.

With the patch I have queued up in the asm-generic tree, the
behavior changes so ioread64_lo_hi() no longer gets turned
into a single 64-bit access, and that is then more likely to
be correct for both 32-bit and 64-bit architectures in case the
device doesn't actually implement 64-bit transactions but does
correctly latch the contents.

      Arnd