Re: [PATCH v3 1/3] net: phy: bcm63xx: add support for BCM63268 GPHY

On Thu, 27 Feb 2025 16:27:15 -0800
Kyle Hendry [off-list ref] wrote:

Add support for the internal gigabit PHY on the BCM63268 SoC.
Some of the PHY functionality is configured out of band through
memory mapped registers. The GPHY control register contains bits
which need to be written to enable/disable low power mode. The
register is part of the SoC's GPIO controller, so accessing it
is done through a phandle to that syscon.

...

+static int bcm63268_gphy_resume(struct phy_device *phydev)
+{
+	int ret;
+
+	ret = bcm63268_gphy_set(phydev, true);
+	if (ret)
+		return ret;
+
+	ret = genphy_resume(phydev);
+	if (ret)
+		return ret;
+
+	return 0;

No need for the last check. You can simply do this:
	return genphy_resume(phydev);

+}
+
+static int bcm63268_gphy_suspend(struct phy_device *phydev)
+{
+	int ret;
+
+	ret = genphy_suspend(phydev);
+	if (ret)
+		return ret;
+
+	ret = bcm63268_gphy_set(phydev, false);
+	if (ret)
+		return ret;
+
+	return 0;

Same here.

+}
+
+static int bcm63268_gphy_probe(struct phy_device *phydev)
+{
+	struct mdio_device *mdio = &phydev->mdio;
+	struct device *dev = &mdio->dev;
+	struct reset_control *reset;
+	struct bcm_gphy_priv *priv;
+	struct regmap *regmap;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	phydev->priv = priv;
+
+	regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
"brcm,gpio-ctrl");
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	priv->gpio_ctrl = regmap;
+
+	reset = devm_reset_control_get_optional_exclusive(dev, NULL);
+	if (IS_ERR(reset))
+		return PTR_ERR(reset);
+
+	ret = reset_control_reset(reset);
+	if (ret)
+		return ret;
+
+	return 0;

Same here.



-- 
Köry Maincent, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com