Re: [net-next PATCH v2 6/6] octeontx2-pf: CN20K mbox implementation between PF-VF
From: Simon Horman <horms@kernel.org>
Date: 2024-11-01 10:04:09
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On Wed, Oct 23, 2024 at 12:24:10AM +0530, Sai Krishna wrote:
This patch implements the CN20k MBOX communication between PF and it's VFs. CN20K silicon got extra interrupt of MBOX response for trigger interrupt. Also few of the CSR offsets got changed in CN20K against prior series of silicons. Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: Sai Krishna <redacted>
...
quoted hunk ↗ jump to hunk
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c index 148a5c91af55..1a7920327fd5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c@@ -565,6 +565,23 @@ irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq) return IRQ_HANDLED; } +static void *cn20k_pfvf_mbox_alloc(struct otx2_nic *pf, int numvfs) +{ + struct qmem *mbox_addr; + int err; + + err = qmem_alloc(&pf->pdev->dev, &mbox_addr, numvfs, MBOX_SIZE);
Hi Sai and Sunil, MBOX_SIZE is 0x10000 (i.e. 2^16). But qmem_alloc() will assign this value to the entry_sz field of an instance of struct qmem, whose type is u16. Thus the value will be truncated to 0. I didn't dig further, but this doesn't seem desirable. Flagged by Sparse on x86_64. Also, not strictly related to this patchset: There Sparse flags a handful of warnings in .../marvell/octeontx2/nic/otx2_pf.c, which all seem to relate to __iomem annotations. It would be nice to investigate and resolve those at some point.
+ if (err) {
+ dev_err(pf->dev, "qmem alloc fail\n");
+ return ERR_PTR(-ENOMEM);
+ }
+
+ otx2_write64(pf, RVU_PF_VF_MBOX_ADDR, (u64)mbox_addr->iova);
+ pf->pfvf_mbox_addr = mbox_addr;
+
+ return mbox_addr->base;
+}
+
static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs)
{
void __iomem *hwbase;...