Re: [PATCH V2 net 1/9] net: hns3: default enable tx bounce buffer when smmu enabled
From: Jijie Shao <shaojijie@huawei.com>
Date: 2024-10-25 01:10:47
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on 2024/10/25 0:04, Simon Horman wrote:
On Thu, Oct 24, 2024 at 04:31:46PM +0800, Jijie Shao wrote:quoted
on 2024/10/24 16:26, Paolo Abeni wrote:quoted
On 10/18/24 12:10, Jijie Shao wrote:quoted
From: Peiyang Wang <redacted> The SMMU engine on HIP09 chip has a hardware issue. SMMU pagetable prefetch features may prefetch and use a invalid PTE even the PTE is valid at that time. This will cause the device trigger fake pagefaults. The solution is to avoid prefetching by adding a SYNC command when smmu mapping a iova. But the performance of nic has a sharp drop. Then we do this workaround, always enable tx bounce buffer, avoid mapping/unmapping on TX path. This issue only affects HNS3, so we always enable tx bounce buffer when smmu enabled to improve performance. Signed-off-by: Peiyang Wang <redacted> Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Jijie Shao <shaojijie@huawei.com>I'm sorry to nick pick on somewhat small details, but we really need a fixes tag here to make 110% clear is a bugfix. I guess it could be the commit introducing the support for the buggy H/W. Thanks, PaoloI have a little doubt that this patch is about H/W problem, so how can we write the the fixes tag?Hi Jijie, That is a good point. But the much point of the Fixes tag is to indicate how far back the fix should be backported. So I would say the ID of the patch where the user would have first seen this problem - possibly the patch that added the driver.
That's a good idea. Thank you.