Hi Russell

On Tue, Jun 18, 2024 at 01:26:52PM +0300, Serge Semin wrote:

On Fri, Jun 14, 2024 at 12:14:21AM +0300, Serge Semin wrote:

quoted

On Wed, Jun 12, 2024 at 11:04:11PM +0100, Russell King (Oracle) wrote:

quoted

On Tue, Jun 11, 2024 at 03:25:14PM +0300, Serge Semin wrote:

quoted

Hi Russell, Andrew

Should we have a DW IP-core-specific getter like
stmmac_ops::pcs_get_config_reg() which would return the
tx_config_reg[15:0] field then we could have cleared the IRQ by just
calling it, we could have had the fields generically
parsed in the dwmac_pcs_isr() handler and in the
phylink_pcs_ops::pcs_get_state().

[...]

quoted

There's a good reason for this - dealing with latched-low link failed
indications, it's necessary that pcs_get_state() reports that the link
failed if _sometime_ between the last time it was called and the next
time the link has failed.

So, I'm afraid your idea of simplifying it doesn't sound to me like a
good idea.

No caching or latched link state indications. Both the GMAC_RGSMIIIS
and GMAC_PHYIF_CONTROL_STATUS registers contain the actual link state
retrieved the PHY. stmmac_pcs_get_config_reg() will just return the
current link state.

Perhaps my suggestion might haven't been well described. Providing the
patches with the respective changes shall better describe what was
meant. So in a few days I'll submit an incremental patch(es) with the
proposed modifications for your series

The incremental patchset is ready. I need to give it some more
tests, then rebase onto the kernel 6.10. It'll be done in one-two
days.

It turned out I has created my series on top of your v1 series. I just
finished rebasing it onto v2. The only thing left is to test it out.
I'll do that today and then submit the series in-reply to your v2
email thread. Sorry for making you wait once again.

-Serge

Thanks
-Serge(y)
.

quoted

-Serge(y)

quoted

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