@@ -1155,4 +1155,15 @@ struct ethtool_forced_speed_map {
 
 void
 ethtool_forced_speed_maps_init(struct ethtool_forced_speed_map *maps, u32 size);
+
+/* C33 PSE extended state and substate. */
+struct ethtool_c33_pse_ext_state_info {
+	enum ethtool_c33_pse_ext_state c33_pse_ext_state;
+	union {
+		enum ethtool_c33_pse_ext_substate_voltage_issue voltage_issue;
+		enum ethtool_c33_pse_ext_substate_current_issue current_issue;
+		enum ethtool_c33_pse_ext_substate_config config;
+		u32 __c33_pse_ext_substate;
+	};
+};
 #endif /* _LINUX_ETHTOOL_H */

@@ -36,12 +36,20 @@ struct pse_control_config {
  *	functions. IEEE 802.3-2022 30.9.1.1.2 aPSEAdminState
  * @c33_pw_status: power detection status of the PSE.
  *	IEEE 802.3-2022 30.9.1.1.5 aPSEPowerDetectionStatus:
+ * @c33_pw_class: detected class of a powered PD
+ *	IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification
+ * @c33_actual_pw: power currently delivered by the PSE in mW
+ *	IEEE 802.3-2022 30.9.1.1.23 aPSEActualPower
+ * @c33_ext_state_info: extended state information of the PSE
  */
 struct pse_control_status {
 	enum ethtool_podl_pse_admin_state podl_admin_state;
 	enum ethtool_podl_pse_pw_d_status podl_pw_status;
 	enum ethtool_c33_pse_admin_state c33_admin_state;
 	enum ethtool_c33_pse_pw_d_status c33_pw_status;
+	u32 c33_pw_class;
+	u32 c33_actual_pw;
+	struct ethtool_c33_pse_ext_state_info c33_ext_state_info;
 };
 
 /**

@@ -752,6 +752,47 @@ enum ethtool_module_power_mode {
 	ETHTOOL_MODULE_POWER_MODE_HIGH,
 };
 
+/* C33 PSE extended state */
+enum ethtool_c33_pse_ext_state {
+	ETHTOOL_C33_PSE_EXT_STATE_UNKNOWN = 1,
+	ETHTOOL_C33_PSE_EXT_STATE_DETECTION,
+	ETHTOOL_C33_PSE_EXT_STATE_CLASSIFICATION_FAILURE,
+	ETHTOOL_C33_PSE_EXT_STATE_HARDWARE_ISSUE,
+	ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE,
+	ETHTOOL_C33_PSE_EXT_STATE_CURRENT_ISSUE,
+	ETHTOOL_C33_PSE_EXT_STATE_POWER_BUDGET_EXCEEDED,
+	ETHTOOL_C33_PSE_EXT_STATE_CONFIG,
+	ETHTOOL_C33_PSE_EXT_STATE_TEMP_ISSUE,
+};
+
+/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_DETECTION. */
+enum ethtool_c33_pse_ext_substate_detection {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_IN_PROGRESS = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_FAILURE,
+};
+
+/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE. */
+enum ethtool_c33_pse_ext_substate_voltage_issue {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_V_INJECTION = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_V_SHORT_DETECTED,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_V_OVERVOLTAGE,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_V_UNDERVOLTAGE,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_V_OPEN,
+};
+
+/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_CURRENT_ISSUE. */
+enum ethtool_c33_pse_ext_substate_current_issue {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_CRT_OVERLOAD = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_CRT_UNDERLOAD,
+};
+
+/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_CONFIG.
+ */
+enum ethtool_c33_pse_ext_substate_config {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_CHANGED = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_UNDEFINED,
+};
+
 /**
  * enum ethtool_pse_types - Types of PSE controller.
  * @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown

@@ -915,6 +915,10 @@ enum {
 	ETHTOOL_A_C33_PSE_ADMIN_STATE,		/* u32 */
 	ETHTOOL_A_C33_PSE_ADMIN_CONTROL,	/* u32 */
 	ETHTOOL_A_C33_PSE_PW_D_STATUS,		/* u32 */
+	ETHTOOL_A_C33_PSE_PW_CLASS,		/* u32 */
+	ETHTOOL_A_C33_PSE_ACTUAL_PW,		/* u32 */
+	ETHTOOL_A_C33_PSE_EXT_STATE,		/* u8 */
+	ETHTOOL_A_C33_PSE_EXT_SUBSTATE,		/* u8 */
 
 	/* add new constants above here */
 	__ETHTOOL_A_PSE_CNT,

@@ -86,7 +86,14 @@ static int pse_reply_size(const struct ethnl_req_info *req_base,
 		len += nla_total_size(sizeof(u32)); /* _C33_PSE_ADMIN_STATE */
 	if (st->c33_pw_status > 0)
 		len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_D_STATUS */
-
+	if (st->c33_pw_class > 0)
+		len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_CLASS */
+	if (st->c33_actual_pw > 0)
+		len += nla_total_size(sizeof(u32)); /* _C33_PSE_ACTUAL_PW */
+	if (st->c33_ext_state_info.c33_pse_ext_state)
+		len += nla_total_size(sizeof(u8)); /* _C33_PSE_EXT_STATE */
+	if (st->c33_ext_state_info.__c33_pse_ext_substate)
+		len += nla_total_size(sizeof(u8)); /* _C33_PSE_EXT_SUBSTATE */
 	return len;
 }
 

@@ -117,6 +124,26 @@ static int pse_fill_reply(struct sk_buff *skb,
 			st->c33_pw_status))
 		return -EMSGSIZE;
 
+	if (st->c33_pw_class > 0 &&
+	    nla_put_u32(skb, ETHTOOL_A_C33_PSE_PW_CLASS,
+			st->c33_pw_class))
+		return -EMSGSIZE;
+
+	if (st->c33_actual_pw > 0 &&
+	    nla_put_u32(skb, ETHTOOL_A_C33_PSE_ACTUAL_PW,
+			st->c33_actual_pw))
+		return -EMSGSIZE;
+
+	if (st->c33_ext_state_info.c33_pse_ext_state > 0 &&
+	    nla_put_u8(skb, ETHTOOL_A_C33_PSE_EXT_STATE,
+		       st->c33_ext_state_info.c33_pse_ext_state))
+		return -EMSGSIZE;
+
+	if (st->c33_ext_state_info.__c33_pse_ext_substate > 0 &&
+	    nla_put_u8(skb, ETHTOOL_A_C33_PSE_EXT_SUBSTATE,
+		       st->c33_ext_state_info.__c33_pse_ext_substate))
+		return -EMSGSIZE;
+
 	return 0;
 }