Hi Andrew,

On 29/02/2024 22:23, Andrew Lunn wrote:

quoted

quoted

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--- a/Documentation/devicetree/bindings/net/ti,dp83822.yaml
+++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml

@@ -80,6 +80,22 @@ properties:
              10625, 11250, 11875, 12500, 13125, 13750, 14375, 15000]
       default: 10000
+  ti,rmii-mode:
+    description: |
+       If present, select the RMII operation mode. Two modes are
+       available:
+         - RMII master, where the PHY operates from a 25MHz clock reference,
+         provided by a crystal or a CMOS-level oscillator
+         - RMII slave, where the PHY operates from a 50MHz clock reference,
+         provided by a CMOS-level oscillator

What has master and slave got to do with this?

Sometimes, the MAC provides a clock to the PHY, and all data transfer
over the RMII bus is timed by that.

Sometimes, the PHY provides a clock to the MAC, and all data transfer
over the RMII bus is timed by that.

Here there is a clear master/slave relationship, who is providing the
clock, who is consuming the clock. However, what you describe does not
fit that. Maybe look at other PHY bindings, and copy what they do for
clocks.

In fact, I hesitated a lot before choosing this master/slave designation
because of the same reasoning as you. But the TI DP83826 datasheet [1] uses
this name for two orthogonal yet connected meanings, here's a copy of the
corresponding § (in section 9.3.10):

"The DP83826 offers two types of RMII operations: RMII Slave and RMII
Master. In RMII Master operation, the DP83826 operates from either a 25-MHz
CMOS-level oscillator connected to XI pin, a 25-MHz crystal connected across
XI and XO pins. A 50-MHz output clock referenced from DP83826 can be
connected to the MAC. In RMII Slave operation, the DP83826 operates from a
50-MHz CMOS-level oscillator connected to the XI pin and shares the same
clock as the MAC. Alternatively, in RMII slave mode, the PHY can operate
from a 50-MHz clock provided by the Host MAC."

So it seems that in some cases this also fits the master/slave relationship
you describe.

We are normally interested in this 50Mhz reference clock. So i would
drop all references to 25Mhz. It is not relevant to the binding, since
it is nothing to do with connecting the PHY to the MAC, and it has a
fixed value.

So you can simplify this down to:

RMII Master: Outputs a 50Mhz Reference clock which can be connected to the MAC.

RMII Slave: Expects a 50MHz Reference clock input, shared with the
MAC.

quoted

That said, would you like me to include this description (or some parts) in
the binding in addition to what I've already written? Or would you prefer me
to use a more meaningful property name?

We don't really have any vendor agnostic consistent naming. dp83867
and dp83869 seems to call this ti,clk-output-sel. Since this is
another dp83xxx device, it would be nice if there was consistency
between all these TI devices. So could you check if the concept is the
same, and if so, change dp83826 to follow what other TI devices do.

So I had a look at this ti,clk-output-sel property on the TI DP8386x 
bindings, but unfortunately it does not correspond to our use case. In 
their case, it is used to select one of the various internal clocks to 
output on the CLK_OUT pin.
In our case, we would prefer to describe the direction of the clock (OUT 
in master mode, IN in slave mode).

Given this, should we stick to "ti,rmii-mode" which is consistent with 
the datasheet terminology, or consider perhaps something like 
ti,clock-dir-sel (with possible values of in/out)?"

Best regards,
Jérémie