[PATCH 1/4] PCI/AER: Cleanup register variable
From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Date: 2024-02-06 13:57:39
Also in:
intel-wired-lan, linux-edac, linux-efi, linux-pci, linuxppc-dev, lkml
Subsystem:
pci enhanced error handling (eeh) for powerpc, pci subsystem, the rest · Maintainers:
Mahesh J Salgaonkar, Bjorn Helgaas, Linus Torvalds
Use u32 for PCIe Capability register variable and name it aercc (Advanced Error Capabilities and Control register, PCIe r6.1 sec 7.8.4.7) instead of temp. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> --- drivers/pci/pcie/aer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 05fc30bb5134..e31e6a9a7773 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c@@ -1210,7 +1210,7 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) { int type = pci_pcie_type(dev); int aer = dev->aer_cap; - int temp; + u32 aercc; /* Must reset in this function */ info->status = 0;
@@ -1241,8 +1241,8 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) return 0; /* Get First Error Pointer */ - pci_read_config_dword(dev, aer + PCI_ERR_CAP, &temp); - info->first_error = PCI_ERR_CAP_FEP(temp); + pci_read_config_dword(dev, aer + PCI_ERR_CAP, &aercc); + info->first_error = PCI_ERR_CAP_FEP(aercc); if (info->status & AER_LOG_TLP_MASKS) { info->tlp_header_valid = 1;
--
2.39.2