Also, add support for gpll0_out_aux clock which acts as the parent for
certain networking subsystem (nss) clocks.

Signed-off-by: Devi Priya <redacted>
---
 Changes in V3:
        - Dropped flags for gpll0_out_aux
        - Dropped few nss clock entries from the clock table and enabled
          them in the probe

 drivers/clk/qcom/gcc-ipq9574.c | 83 ++++++++++++----------------------
 1 file changed, 28 insertions(+), 55 deletions(-)

diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
index e8190108e1ae..987703431b5b 100644
--- a/drivers/clk/qcom/gcc-ipq9574.c
+++ b/drivers/clk/qcom/gcc-ipq9574.c

@@ -105,6 +105,20 @@ static struct clk_alpha_pll_postdiv gpll0 = {
        },
 };

+static struct clk_alpha_pll_postdiv gpll0_out_aux = {
+       .offset = 0x20000,
+       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
+       .width = 4,
+       .clkr.hw.init = &(const struct clk_init_data) {
+               .name = "gpll0_out_aux",
+               .parent_hws = (const struct clk_hw *[]) {
+                       &gpll0_main.clkr.hw
+               },
+               .num_parents = 1,
+               .ops = &clk_alpha_pll_postdiv_ro_ops,
+       },
+};
+
 static struct clk_alpha_pll gpll4_main = {
        .offset = 0x22000,
        .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],

@@ -2186,23 +2200,6 @@ static struct clk_branch gcc_nsscfg_clk = {
        },
 };

-static struct clk_branch gcc_nssnoc_nsscc_clk = {
-       .halt_reg = 0x17030,
-       .clkr = {
-               .enable_reg = 0x17030,
-               .enable_mask = BIT(0),
-               .hw.init = &(const struct clk_init_data) {
-                       .name = "gcc_nssnoc_nsscc_clk",
-                       .parent_hws = (const struct clk_hw *[]) {
-                               &pcnoc_bfdcd_clk_src.clkr.hw
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-

 static struct clk_branch gcc_nsscc_clk = {
        .halt_reg = 0x17034,
        .clkr = {

@@ -2585,40 +2582,6 @@ static struct clk_branch gcc_q6ss_boot_clk = {
        },
 };

-static struct clk_branch gcc_nssnoc_snoc_clk = {
-       .halt_reg = 0x17028,
-       .clkr = {
-               .enable_reg = 0x17028,
-               .enable_mask = BIT(0),
-               .hw.init = &(const struct clk_init_data) {
-                       .name = "gcc_nssnoc_snoc_clk",
-                       .parent_hws = (const struct clk_hw *[]) {
-                               &system_noc_bfdcd_clk_src.clkr.hw
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch gcc_nssnoc_snoc_1_clk = {
-       .halt_reg = 0x1707c,
-       .clkr = {
-               .enable_reg = 0x1707c,
-               .enable_mask = BIT(0),
-               .hw.init = &(const struct clk_init_data) {
-                       .name = "gcc_nssnoc_snoc_1_clk",
-                       .parent_hws = (const struct clk_hw *[]) {
-                               &system_noc_bfdcd_clk_src.clkr.hw
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
 static struct clk_branch gcc_qdss_etr_usb_clk = {
        .halt_reg = 0x2d060,
        .clkr = {

@@ -4043,7 +4006,6 @@ static struct clk_regmap *gcc_ipq9574_clks[] = {
        [GCC_SDCC1_AHB_CLK] = &gcc_sdcc1_ahb_clk.clkr,
        [PCNOC_BFDCD_CLK_SRC] = &pcnoc_bfdcd_clk_src.clkr,
        [GCC_NSSCFG_CLK] = &gcc_nsscfg_clk.clkr,
-       [GCC_NSSNOC_NSSCC_CLK] = &gcc_nssnoc_nsscc_clk.clkr,
        [GCC_NSSCC_CLK] = &gcc_nsscc_clk.clkr,
        [GCC_NSSNOC_PCNOC_1_CLK] = &gcc_nssnoc_pcnoc_1_clk.clkr,
        [GCC_QDSS_DAP_AHB_CLK] = &gcc_qdss_dap_ahb_clk.clkr,

@@ -4059,8 +4021,6 @@ static struct clk_regmap *gcc_ipq9574_clks[] = {
        [GCC_CMN_12GPLL_AHB_CLK] = &gcc_cmn_12gpll_ahb_clk.clkr,
        [GCC_CMN_12GPLL_APU_CLK] = &gcc_cmn_12gpll_apu_clk.clkr,
        [SYSTEM_NOC_BFDCD_CLK_SRC] = &system_noc_bfdcd_clk_src.clkr,
-       [GCC_NSSNOC_SNOC_CLK] = &gcc_nssnoc_snoc_clk.clkr,
-       [GCC_NSSNOC_SNOC_1_CLK] = &gcc_nssnoc_snoc_1_clk.clkr,
        [GCC_QDSS_ETR_USB_CLK] = &gcc_qdss_etr_usb_clk.clkr,
        [WCSS_AHB_CLK_SRC] = &wcss_ahb_clk_src.clkr,
        [GCC_Q6_AHB_CLK] = &gcc_q6_ahb_clk.clkr,

@@ -4140,6 +4100,7 @@ static struct clk_regmap *gcc_ipq9574_clks[] = {
        [GCC_SNOC_PCIE1_1LANE_S_CLK] = &gcc_snoc_pcie1_1lane_s_clk.clkr,
        [GCC_SNOC_PCIE2_2LANE_S_CLK] = &gcc_snoc_pcie2_2lane_s_clk.clkr,
        [GCC_SNOC_PCIE3_2LANE_S_CLK] = &gcc_snoc_pcie3_2lane_s_clk.clkr,
+       [GPLL0_OUT_AUX] = &gpll0_out_aux.clkr,
 };

 static const struct qcom_reset_map gcc_ipq9574_resets[] = {

@@ -4326,7 +4287,19 @@ static const struct qcom_cc_desc gcc_ipq9574_desc = {

 static int gcc_ipq9574_probe(struct platform_device *pdev)
 {
-       return qcom_cc_probe(pdev, &gcc_ipq9574_desc);
+       struct regmap *regmap;
+
+       regmap = qcom_cc_map(pdev, &gcc_ipq9574_desc);
+
+       if (IS_ERR(regmap))
+               return PTR_ERR(regmap);
+
+       /* Keep the critical clocks always-On */
+       regmap_update_bits(regmap, 0x17030, BIT(0), BIT(0)); /* gcc_nssnoc_nsscc_clk */
+       regmap_update_bits(regmap, 0x17028, BIT(0), BIT(0)); /* gcc_nssnoc_snoc_clk */
+       regmap_update_bits(regmap, 0x1707C, BIT(0), BIT(0)); /* gcc_nssnoc_snoc_1_clk */
+
+       return qcom_cc_really_probe(pdev, &gcc_ipq9574_desc, regmap);
 }

 static struct platform_driver gcc_ipq9574_driver = {
--

2.34.1