From: Bernd Edlinger <redacted>
Date: Fri, Jan 19, 2024 at 07:15:31

On 1/17/24 17:55, Jose Abreu wrote:

quoted

From: Bernd Edlinger <redacted>
Date: Wed, Jan 17, 2024 at 16:48:22

quoted

I don't know at all.  And actually, I am more concerned that other registers
might be unreliable within the first microsecond after reset is de-asserted.

Are you guaranteeing that the documented PoR time is achieved before reading registers?

Yes, that is the idea, why I added the udelay directly after releasing the reset,
thus simply delaying the execution of the stmmac_hw_init function, and not directly
where the synopsys_id register is accessed.

I understand your point, but the delay should be on reset function itself, since it depends
on the SoC that stmmac is integrated.

Please refer to reset_simple_reset(), where usleep_range() is used.

Thanks,
Jose