Thread (24 messages) 24 messages, 6 authors, 2023-12-18
STALE927d
Revisions (4)
  1. v1 [diff vs current]
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  3. v3 current
  4. v4 [diff vs current]

[PATCH v3 7/9] riscv: dts: starfive: beaglev-starlight: Setup phy reset gpio

From: Cristian Ciocaltea <hidden>
Date: 2023-12-15 20:41:01
Also in: linux-arm-kernel, linux-clk, linux-devicetree, linux-riscv, lkml
Subsystem: risc-v architecture, starfive devicetrees, the rest · Maintainers: Paul Walmsley, Palmer Dabbelt, Albert Ou, Emil Renner Berthing, Conor Dooley, Linus Torvalds

The BeagleV Starlight SBC uses a Microchip KSZ9031RNXCA PHY supporting
RGMII-ID which doesn't require any particular setup, other than defining
a reset gpio, as opposed to VisionFive V1 for which the RX internal
delay had to be adjusted.

Co-developed-by: Emil Renner Berthing <redacted>
Signed-off-by: Emil Renner Berthing <redacted>
Signed-off-by: Cristian Ciocaltea <redacted>
---
 arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts | 7 +++++++
 1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
index 7cda3a89020a..5ac9961226fc 100644
--- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
+++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
@@ -11,3 +11,10 @@ / {
 	model = "BeagleV Starlight Beta";
 	compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
 };
+
+&mdio {
+	phy: ethernet-phy@7 {
+		reg = <7>;
+		reset-gpios = <&gpio 63 GPIO_ACTIVE_LOW>;
+	};
+};
-- 
2.43.0
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