[PATCH net-next v7 2/5] ptp: clockmatrix: set write phase timer to 0 when not in PCW mode
From: Min Li <hidden>
Date: 2023-12-14 15:24:37
Also in:
lkml
Subsystem:
networking drivers, ptp hardware clock support, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Richard Cochran, Linus Torvalds
Possibly related (same subject, not in this thread)
- 2024-05-01 · [PATCH net-next v7 2/5] ptp: clockmatrix: set write phase timer to 0 when not in PCW mode · Min Li <hidden>
- 2024-03-18 · [PATCH net-next v7 2/5] ptp: clockmatrix: set write phase timer to 0 when not in PCW mode · Min Li <hidden>
- 2024-03-14 · [PATCH net-next v7 2/5] ptp: clockmatrix: set write phase timer to 0 when not in PCW mode · Min Li <hidden>
- 2024-01-04 · [PATCH net-next v7 2/5] ptp: clockmatrix: set write phase timer to 0 when not in PCW mode · Min Li <hidden>
From: Min Li <redacted> In order for phase pull-in to work, write phase timer shall be 0 when not in write phase mode. Also Fix u8 -> u16, DPLL_WF_TIMER and DPLL_WP_TIMER are 2-byte registers Signed-off-by: Min Li <redacted> --- drivers/ptp/ptp_clockmatrix.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c
index f8556627befa..d069b6e451ef 100644
--- a/drivers/ptp/ptp_clockmatrix.c
+++ b/drivers/ptp/ptp_clockmatrix.c@@ -1396,6 +1396,20 @@ static int idtcm_set_pll_mode(struct idtcm_channel *channel, struct idtcm *idtcm = channel->idtcm; int err; u8 dpll_mode; + u8 buf[2] = {0}; + + /* Setup WF/WP timer for phase pull-in to work correctly */ + err = idtcm_write(idtcm, channel->dpll_n, DPLL_WF_TIMER, + buf, sizeof(buf)); + if (err) + return err; + + if (mode == PLL_MODE_WRITE_PHASE) + buf[0] = 160; + err = idtcm_write(idtcm, channel->dpll_n, DPLL_WP_TIMER, + buf, sizeof(buf)); + if (err) + return err; err = idtcm_read(idtcm, channel->dpll_n, IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_MODE),
--
2.39.2